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Method for converting layout image into CIF file based on image edge detection

An image edge and image conversion technology, applied in the field of image processing, can solve problems such as coverage, inability to perform good identification, and low efficiency of complex image processing, so as to improve the yield and reliability, reduce the loss of information, reduce The effect of memory requirements

Active Publication Date: 2015-07-22
XIDIAN UNIV
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Problems solved by technology

It still has the following shortcomings. First, it cannot recognize images containing holes and nested holes well, and may cover the holes; second, it needs a lot of high density in the process of corner detection. High-complexity operations, low efficiency for complex image processing

Method used

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  • Method for converting layout image into CIF file based on image edge detection
  • Method for converting layout image into CIF file based on image edge detection
  • Method for converting layout image into CIF file based on image edge detection

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Embodiment Construction

[0024] The technical embodiments and effects of the present invention will be further described in detail below in conjunction with the accompanying drawings.

[0025] 1. Terminology

[0026] The layout image in the present invention uses a BMP image. The BMP image is different from the coordinate-based graphics recording method. It is a method of recording image data based on pixel scanning. The amount of data depends on the number of pixels rather than the complexity of the graphics. BMP image is a standard non-compressed image format under Windows environment, and other image graphics files can be converted into BMP files without hindrance. There are various sources of BMP files, which can be microscopic images taken by digital cameras, or images displayed on computers can be intercepted by capture software. The present invention is mainly aimed at BMP files obtained by capture software or generated by a computer. If micrographs taken from a digital camera or drawings sca...

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Abstract

The invention provides a method for converting a layout image into a CIF file based on image edge detection. The method mainly solves the problems that for an existing conversion method, graphs overlap, data redundancy occurs and the conversion accuracy is not high. The method comprises the steps that 1, the layout image is converted into a binary image; 2, holes of the binary image are made to be communicated with one another; 3, edge extraction is conducted on the binary image with the holes which are made to be communicated with one another; 4, the peak of the image is calculated according to an edge extraction result, and peak information is optimized; 5, the shape of the image is matched according to the image peak information, and the shape of the image is converted into a CIF format instruction according to a CIF format rule; 6, all CIF commands are written in the CIF file. The method for converting the layout image into the CIF file based on the image edge detection has the advantages of being high in conversion accuracy, strong in universality, low in system resource consumption and capable of being applied to the optimization work of an integrated circuit layout.

Description

technical field [0001] The invention belongs to the technical field of image processing, and further relates to a method for converting a layout image in an integrated circuit into a standard layout data format, which can be applied to the optimization of the layout of an integrated circuit. Background technique [0002] With the continuous development of integrated circuits, the manufacturing process is becoming more and more complex, and the types of components are becoming more and more diverse. In the process of integrated circuit production, due to insufficient technology or design, there are always some integrated circuits that cannot meet the design requirements. The requirements even cannot work normally, which eventually leads to the status quo of the decline in the yield of integrated circuits. There are not only various semiconductor devices in the layout, but also interconnections between them. At the same time, in order to save the chip area, a multi-layer wirin...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F17/50
Inventor 王俊平赵腾伟贾博文高康支爽爽马瑞芳
Owner XIDIAN UNIV
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