A method of differential protection based on fpga

Abstract

The invention provides an FPGA (Field Programmable Gate Array)-based differential protection method. The method comprises the following steps: (1) computing differential protection; (2) performing in-phase channel sampling; (3) adopting a constant value matching technology of an upper computer; (4) adopting a shifting multiplication and division method; (5) adopting a time division multiplexing method of a state machine; (6) testing rate braking characteristics of a transformer. According to the FPGA-based differential protection method, the processing speed of hardware protection logic is increased by utilizing high-speed FPGA parallel computing, and the safety and the reliability of motions are guaranteed. By the adoption of an in-phase channel sampling technology, the synchronism of current deviation at two ends of the differential protection is guaranteed, the motion error is reduced, and the motion precision is guaranteed; by the adoption of the constant value matching technology of the upper computer, high precision is guaranteed, the operational complexity and the operational amount are greatly reduced, and the operational speed is increased. By the adoption of the shifting multiplication and division method, multipliers and dividers are reduced, and the utilization rate of resources is improved. By the adoption of a state machine designing method, the multipliers, the dividers and comparators are subjected to time division multiplexing, and the utilization rate of hardware resources is greatly improved.

Description

technical field [0001] The invention relates to a differential protection method, in particular to an FPGA-based differential protection method. Background technique [0002] The differential protection based on Kirchhoff's current law has been widely used as the main protection of generators, transformers, busbars, large motors and other components because of its simple principle, good selectivity and high reliability, and has obtained good application effect. In the prior art of differential protection implementation, DSP is used as the core to implement differential protection logic calculation. Due to its own structural reasons, this implementation method has disadvantages such as slow speed, low efficiency, many starting components, and poor reliability. Contents of the invention [0003] Aiming at the deficiencies of the prior art, the present invention proposes a FPGA-based differential protection hardware algorithm, which utilizes the advantages of FPGA parallel c...

AI Technical Summary

Problems solved by technology

In the prior art of differential protection implementation, DSP is used as the core to implement differential protection logic calculation. Due to its own structural reasons, this implementation method has disadvantages such as slow speed, low efficiency, many starting components, and poor reliability.

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