A Method of Improving the Uniformity of Chip Degradation
A uniformity and chip technology, applied in the field of semiconductor failure analysis, can solve problems such as failure to continue analysis of failure cases, failure of sample preparation, reduction of work efficiency, etc., to improve grinding quality, sample preparation success rate, work efficiency, and flatness. and uniformity, improving the effect of uneven grinding
Active Publication Date: 2019-01-18
SHANGHAI HUALI MICROELECTRONICS CORP
View PDF8 Cites 0 Cited by
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
When the target position of the analysis is located on the edge of the chip (such as input and output circuits, electrostatic discharge protection circuits, etc. are very close to the edge of the chip), according to the existing method of directly manually grinding the sample, the difficulty of grinding the sample is extremely high. It takes a lot of time to ensure that the grinding is even and smooth, which reduces the work efficiency; and there are often sample preparation failures, which directly lead to the inability to continue the analysis of failure cases
Method used
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View moreImage
Smart Image Click on the blue labels to locate them in the text.
Smart ImageViewing Examples
Examples
Experimental program
Comparison scheme
Effect test
Embodiment Construction
[0030] The specific embodiment of the present invention will be further described in detail below in conjunction with the accompanying drawings.
[0031] It should be noted that, in the following specific embodiments, when describing the embodiments of the present invention in detail, in order to clearly show the structure of the present invention for the convenience of description, the structures in the drawings are not drawn according to the general scale, and are drawn Partial magnification, deformation and simplification are included, therefore, it should be avoided to be interpreted as a limitation of the present invention.
[0032] In the following specific embodiments of the present invention, please refer to Figure 2 ~ Figure 6 , Figure 2 ~ Figure 6 It is a schematic diagram of each step of a method for improving the uniformity of chip de-layering in a preferred embodiment of the present invention; at the same time, please refer to Figure 7 ~ Figure 11 , Figure ...
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More PUM
Login to View More Abstract
The invention discloses a method of improving uniformity in the case of level removal of a chip. Through changing a target position on a grinding sample, and adopting a method of combining and joining a compensation chip and a failure chip sample, a grinding sample which enables the target position at the edge of the failure chip to be located at the central grinding position of a base chip is formed, the target position region of the failure chip and the compensation chip generate mutual compensation effects in the case of grinding, levels can be quickly and uniformly removed, a corresponding region is remained, flatness and uniformity of the surface after the failure chip sample is grinded can be improved, problems that the chip edge is nonuniformly grinded and layering is likely to happen can be improved, and the grinding quality, the sample preparation success rate and the working efficiency are improved.
Description
technical field [0001] The invention relates to the field of semiconductor failure analysis, and more specifically, relates to a method for improving the uniformity of chip degradation. Background technique [0002] In the process of failure analysis of semiconductor chips, it is necessary to perform delaying treatment on the failed chip samples by grinding, so as to further observe and analyze the specific layers of the samples under a high-magnification microscope. The quality of grinding will directly affect the accurate analysis of failed chips. Therefore, grinding and dehierarchy are both the foundation and the focus in failure analysis. When performing failure analysis, the workload of grinding and delaminating samples often accounts for more than 50% of the total workload. Therefore, the speed and effect of grinding and delamination directly affect the efficiency and quality of failure analysis work. [0003] When destratifying the failed chip samples, the grinding...
Claims
the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More Application Information
Patent Timeline
Login to View More Patent Type & Authority Patents(China)
IPC IPC(8): G01R31/26
Inventor 刘迪
Owner SHANGHAI HUALI MICROELECTRONICS CORP