A CLB dynamic burn-in configuration method for sram type fpga

Abstract

A CLB dynamic burn-in configuration method for SRAM FPGA, the method has five major steps: Step 1: Burn-in configuration circuit design; Step 2: Name and number the basic component instances of the test chain; Step 3: Write C cycle program generation Configure program code; step 4: use FPGA development tools for layout and routing; step 5: use FPGA development tools to generate bit stream files, download them to FPGA, and apply burn-in vectors through burn-in equipment to realize dynamic burn-in of FPGA. The present invention mainly configures the FPGA by calling hardware primitives, controls the connection mode of the called resources by writing the user constraint file UCF, cascades the internal resources of the FPGA into a test chain in a certain order, and then realizes limited input and output pins and A large number of internal logic connections solves the problem that the large number of CLB resources in the FPGA makes it difficult to manually call hardware primitives.

Description

technical field [0001] The present invention relates to a kind of CLB dynamic burn-in configuration method of SRAM type FPGA, it is a kind of configuration method in the FPGA (Field Programmable Gate Array, Field Programmable Gate Array) dynamic burn-in test based on SRAM technology, belongs to the reliable method of FPGA technical field. Background technique [0002] Field Programmable Gate Array (Field Programmable Gate Array, FPGA) is a programmable logic device. Through programming, a general-purpose FPGA chip can be configured into a hardware digital circuit required by the user. With the rapid development of my country's aerospace industry, more and more missile weapons and aerospace electronic systems use FPGA chips to replace traditional ASIC chips to achieve design, which puts forward higher requirements for the quality and reliability of FPGA. Because FPGA is a special integrated circuit, and burn-in test is an important means to ensure the reliability of integra...

AI Technical Summary

Problems solved by technology

At present, domestic FPGA burn-in is mostly static burn-in, which can only stimulate a small number of defects in FPGA devices, and the internal circuit is not really stressed, so there are certain limitations.

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