An interface circuit and its output circuit

Abstract

The invention provides an interface circuit and an output circuit therein. The output circuit comprises an output driving circuit, a pull-up switch and a short pulse generator. The output driving circuit comprises a first driving switch and a second driving switch. The first driving switch and the second driving switch are successively connected in series between a first voltage source and a grounding terminal. A connected node between the first driving switch and the second driving switch is connected to an output terminal OUT. An input signal makes the first driving switch and the second driving switch conduct alternatively. The pull-up switch is connected between a second voltage source and an output terminal OUT. The short pulse generator is used for generating and outputting a short time pulse signal to a control end of the pull-up switch based on the input signal. When the input signal is jumped to a first logic level from a second logic level, a short time pulse output by the short pulse generator makes the pull-up switch conduct in short time, and the second voltage source rapidly pulls up a voltage of the output terminal OUT. Compared to the prior art, by using the interface circuit and the output circuit, a rising edge speed of an output signal can be increased.

Description

【Technical field】 [0001] The invention relates to the technical field of circuit design, in particular to an interface circuit which utilizes high voltage to enhance the working speed of low voltage signals and an output circuit therein. 【Background technique】 [0002] The existing chip interface is required to output a low-voltage signal, but the power supply voltage in the chip is high voltage, so it is usually necessary to generate a low-voltage power supply interface through an LDO (low dropout regulator, low dropout linear regulator). Under limited conditions, it is required to use a non-capacitor low-dropout linear regulator. The low supply capacity of the low-voltage power generated by this type of circuit limits the rising edge speed of the interface output waveform, such as figure 1 As shown, it is an output signal waveform diagram of a chip interface that uses a non-capacitive low-dropout linear regulator to provide power in the prior art. The rising edge speed of ...

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Problems solved by technology

[0002] The existing chip interface is required to output a low-voltage signal, but the power supply voltage in the chip is high voltage, so it is usually necessary to generate a low-voltage power supply interface through an LDO (low dropout regulator, low dropout linear regulator). Under limited conditions, it is required to use a non-capacitor low-dropout linear regulator. The low supply capacity of the low-voltage power generated by this type of circuit limits the rising edge speed of the interface output waveform, such as figure 1 As shown, it is an output signal waveform diagram of a chip interface that uses a non-capacitive low-dropout linear regulator to provide power in the prior art. The rising edge speed of the output signal OUT is extremely slow, which will make the interface signal operating speed unable to improve

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