Semiconductor device and manufacturing method thereof

Abstract

A semiconductor device and its manufacturing method, the semiconductor device includes: a substrate; and an epitaxial layer located above the substrate, wherein the epitaxial layer includes a plurality of first grooves and a plurality of second trenches arranged alternately along a first direction Groove; wherein the epitaxial layer between each adjacent first groove and second groove includes a first doped region and a second doped region, and the first doped region and the second doped region have different The conductivity type, and the interface between the first doped region and the second doped region forms a super junction structure; and a gate structure, located above the epitaxial layer, wherein the epitaxial layer below the gate structure includes along a second A channel extending in a direction, wherein the first direction is perpendicular to the second direction. Compared with the prior art, the present invention can increase the conduction cross-sectional area of ​​the drive current, improve the drive current and reduce the conduction resistance.

Description

technical field [0001] The present invention relates to a semiconductor technology, in particular to a semiconductor device with a super junction structure and a manufacturing method thereof. Background technique [0002] The existing vertical diffused metal oxide semiconductor field effect transistor (VDMOSFET) mainly forms a P-N junction by an N-type epitaxy (Epitaxy) drift region (Drift region) and a P-type base (Base) doping region above it, and the semiconductor element The withstand voltage is mainly borne by the P-N junction. When increasing the operating voltage of a semiconductor device, it is necessary to reduce the dopant concentration and increase the thickness of the N-type epitaxial drift region. In contrast, the above method of increasing the withstand voltage of the P-N junction will also increase the on-resistance (Ron) of the device, and the on-resistance is also limited by the dopant concentration and thickness of the N-type epitaxial drift region. The d...

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Problems solved by technology

However, the pillar-type N-type doped region and pillar-type P-type doped region of this technology are limited by the depth that can be reached by ion implantation and subsequent thermal diffusion, so the cross-sectional area of ​​current conduction is also limited

To increase the total surface area of ​​the N-type doped region and the P-type doped region, the size of the element must be increased

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