Low-power consumption, high-resolution and all-digital phase-locked loop structure

An all-digital phase-locked loop and digital circuit technology, applied in automatic power control, electrical components, etc., can solve the problems of incompatibility in the manufacturing process of quartz crystal oscillator circuits, insufficient manufacturing cost and insufficient circuit integration, and improve the operating frequency range. , improve performance, high-precision effect

Active Publication Date: 2015-09-16
SOI MICRO CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

At the same time, the quartz crystal oscillating circuit is not compatible with the manufacturing process, which will cause additional manufacturing costs, and the integration of the circuit is naturally not high enough, of course, it will also bring additional power consumption.

Method used

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  • Low-power consumption, high-resolution and all-digital phase-locked loop structure
  • Low-power consumption, high-resolution and all-digital phase-locked loop structure
  • Low-power consumption, high-resolution and all-digital phase-locked loop structure

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Embodiment Construction

[0016] The embodiments of the present invention are described in detail below.

[0017] Examples of the embodiments are shown in the drawings, in which the same or similar reference numerals represent the same or similar elements or elements with the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary, and are only used to explain the present invention, and cannot be construed as limiting the present invention. The following disclosure provides many different embodiments or examples for implementing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are only examples, and are not intended to limit the invention. In addition, the present invention may repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplificat...

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Abstract

The invention provides a low-power consumption, high-resolution and all-digital phase-locked loop structure. The low-power consumption, high-resolution and all-digital phase-locked loop structure includes a digital circuit part which comprises at least one numerically-controlled oscillator module, and a logic circuit part which comprises a phase discriminator module, an all-digital phase-locked loop controller module and a frequency dividing module. According to the low-power consumption, high-resolution and all-digital phase-locked loop structure, the numerically-controlled oscillator of a coarse adjustment-and-fine adjustment cascade framework structure is adopted, and therefore, an operating frequency range can be extended, and high accuracy can be maintained; and a plurality of segmented time-delay links form a coarse adjustment part, and therefore, power consumption can be decreased.

Description

Technical field [0001] The present invention relates to the technical field of integrated circuits, in particular to an all-digital phase-locked loop structure. Background technique [0002] With the rapid development of the semiconductor industry, and people's increasing material and cultural needs, especially the attention to the size and weight of electronic products, the area of ​​each electronic chip is becoming smaller and smaller. [0003] In today’s electronic systems, users expect all functions to be integrated into a chip. For example, we must design a universal serial bus (USB) function module in the chip; instead of using an off-chip universal serial bus (USB) interface to increase user expenditure. [0004] In systems such as microprocessors, digital switches, and multimedia systems, clock generators or clock multipliers are often needed, so phase-locked loops have become an important structure in this field. In order to reduce the overall power consumption of the syst...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03L7/18
Inventor 乔树山谢正章赵慧冬黑勇
Owner SOI MICRO CO LTD
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