Memory element and its manufacturing method
A storage element and manufacturing method technology, which is applied to electrical elements, electric solid state devices, semiconductor devices, etc., can solve the problems such as the inability to effectively suppress the growth rate of silicon oxide and the slow growth rate of the furnace tube oxidation method, so as to speed up the manufacturing process rate. , the effect of increasing the generation rate and simplifying the manufacturing process
Active Publication Date: 2018-01-05
WINBOND ELECTRONICS CORP
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Problems solved by technology
Although the growth of silicon oxide by the furnace tube oxidation method can be effectively suppressed by nitrogen implantation, the growth rate by the furnace tube oxidation method is too slow
If the silicon oxide is grown by a wet oxidation manufacturing process, nitrogen implantation cannot effectively suppress the growth rate of silicon oxide
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Embodiment Construction
[0058] Figure 1A to Figure 1R It is a schematic cross-sectional view of the manufacturing process of the storage element according to the first embodiment of the present invention.
[0059] Please refer to Figure 1A , providing a substrate 100, the material of the substrate 100 is, for example, at least one material selected from the group consisting of Si, Ge, SiGe, GaP, GaAs, SiC, SiGeC, InAs and InP. The substrate 100 may also be a silicon-on-insulator (SOI) substrate. The aforementioned substrate 100 includes a unit area 200 (which can be regarded as a third area) and a peripheral area 300 . The peripheral area 300 includes a high voltage element area 310 (which can be regarded as a first area) and a low voltage element area 320 (which can be regarded as a second area).
[0060]Next, a high voltage gate dielectric layer 110 (which can be regarded as a first gate dielectric layer) is formed on the substrate 100 in the high voltage element region 310 . A low voltage gat...
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The invention provides a storage element and a manufacturing method thereof. The manufacturing method of the storage element of the present invention includes forming a first gate dielectric layer on the first region of the substrate. A second gate dielectric layer is formed on the second and third regions of the substrate. A first conductor layer, a buffer layer and a first dielectric layer are sequentially formed on the substrate. Part of the first dielectric layer, part of the buffer layer, part of the first conductor layer and part of the second gate dielectric layer in the second region are removed. A third gate dielectric layer and a second conductor layer are sequentially formed on the substrate in the second region. Remove the buffer layer. A third conductor layer and a second dielectric layer are sequentially formed on the substrate. A plurality of isolation structures are formed in the substrate, and the isolation structures extend into the substrate through the second dielectric layer. The storage element and its manufacturing method of the invention can simplify the manufacturing process and reduce the production cost.
Description
technical field [0001] The present invention relates to a memory element and its manufacturing method, and in particular to a non-volatile memory element and its manufacturing method. Background technique [0002] Memory can be divided into two types: volatile memory (Volatile Memory) and non-volatile memory (Non-Volatile Memory). After the power supply of volatile memory is interrupted, the data stored in the memory will disappear; even if the power supply of non-volatile memory is interrupted, the data stored in the memory will not disappear, and it can be read after re-powering data in memory. Therefore, the non-volatile memory can be widely used in electronic products, especially portable products. [0003] However, in order to reduce costs and simplify manufacturing process steps of semiconductor devices, it has gradually become a trend to integrate elements in the Cell Region and the Periphery Region on the same chip. The triple gate oxide (Triple Gate Oxide) manufa...
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IPC IPC(8): H01L27/11521H01L27/11531H01L21/28H01L29/423H10B41/30H10B41/42H10B69/00
CPCH01L29/401H01L29/42364H10B41/42H10B41/30
Inventor 谢荣源倪志荣苏建伟
Owner WINBOND ELECTRONICS CORP