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Compact three-dimensional memory

一种存储器、存储器件的技术，应用在静态存储器、数字存储器信息、信息存储等方向，能够解决衬底电路布线困难等问题

Active Publication Date: 2015-10-14
CHENGDU HAICUN IP TECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the routing of substrate circuits becomes very difficult due to the dense via holes cutting the substrate into multiple isolated regions

Method used

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Examples

Experimental program
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Embodiment Construction

[0040] Figure 2A-Figure 2E described the first compact three-dimensional memory (3D-M C ), which includes an inner decoding stage. The 3D-M C Contains two storage layers 10, 20 stacked on the substrate 0 ( Figure 2C ). The storage layer 10 contains a storage array 100A and an intra-layer decoding stage 100P (see Figure 2A The circuit diagram in and Figure 2D top view of the ). Memory array 100A contains a plurality of x address lines 11a-11h, a plurality of y address lines 12a-12d, and a plurality of memory devices 1aa-1ad ( Figure 2A ). The intra-layer decoding stage 100P selects one address line from the two address lines of the same memory layer. It contains two control lines 17a, 17b and a plurality of simple switching devices 3aa, 3cb, 3ea, 3gb and so on. Switching device 3aa is formed at the intersection of control line 17a and x-address line 11a, between memory devices 1aa-1ad and contact via hole 13a ( Figure 2D ). The switching device 3aa is generally...

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Abstract

The present invention discloses a compact three-dimensional memory (3D-MC). By forming simple switching devices (e.g., pass transistors) on the address-select lines, contact vias can be shared by the address-select lines in the same memory level, or from different memory levels. This leads to sparser and fewer contact vias. Sparse contact vias can facilitate the realization of three-dimensional integrated circuit (3D-IC).

Description

technical field [0001] The present invention relates to the field of integrated circuit memories, more precisely three-dimensional memories (3D-M). Background technique [0002] Three-dimensional memory (3D-M) is a monolithic semiconductor memory that consists of multiple memory cells (also called memory devices) stacked on top of each other. 3D-M includes three-dimensional read-only memory (3D-ROM) and three-dimensional random access memory (3D-RAM). 3D-ROM can be further divided into three-dimensional mask programmed read-only memory (3D-MPROM) and three-dimensional electrically programmed read-only memory (3D-EPROM). Based on its programming mechanism, 3D-M can contain memristor, resistive random-access memory (RRAM or ReRAM), phase-change memory (PCM), programmable metallization memory (PMM), or conductive-bridging random-access memory (CBRAM), etc. . [0003] US Patent 5,835,396 discloses a 3D-M (3D-ROM) ( Figure 1A ). It contains a semiconductor substrate 0 and su...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C11/16G11C5/02H01L27/102H10B69/00
CPCH01L27/249H01L27/2436G11C13/0004G11C13/0007G11C13/0011G11C13/0023G11C2213/71G11C2213/72H01L27/0688H10B63/84H10B63/30H10N70/20
Inventor 张国飙
Owner CHENGDU HAICUN IP TECH