Fin-type field effect transistor and forming method therefor

Abstract

The invention provides a fin-type field effect transistor and a forming method therefor. The method comprises the steps: providing a semiconductor substrate which comprises a first region and a second region; Injecting ions into the first region, forming a first well region, and etching the semiconductor substrate to form a first fin in the first well region and a second fin in the second region; forming a dielectric layer on the semiconductor substrate, wherein the first and second fins are partly exposed out of the dielectric layer; etching the first and second fins, wherein the etching rate of the first fin doped with the first ions is greater than the etching rate of the second fin, and the height of the second fin after etching is greater than the height of the fin. The fins with different heights are formed on the same semiconductor substrate, thereby meeting the performance demands of different devices.

Description

technical field [0001] The invention relates to the field of semiconductor formation, in particular to a fin field effect transistor and a forming method thereof. Background technique [0002] With the rapid development of integrated circuit (abbreviated as IC) manufacturing technology, the process nodes of traditional integrated circuits are gradually reduced, the size of integrated circuit devices is continuously reduced, and the preparation of integrated circuit devices is constantly updated to improve the performance of integrated circuit devices. [0003] For example, in MOS transistors, the ideal threshold voltage is obtained by forming metals with different work functions between the high-K dielectric layer and the metal gate, thereby improving device performance. However, with the reduction of the feature size of semiconductor technology, the traditional planar MOS transistor cannot meet the demand for device performance. For example, the control ability of the plana...

AI Technical Summary

Problems solved by technology

However, with the reduction of the feature size of semiconductor technology, the traditional planar MOS transistor cannot meet the demand for device performance. For example, the control ability of the planar MOS transistor to the channel current becomes weak, resulting in serious leakage current.

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