SOPC (System on a Programmable Chip) networking based sub-microsecond level clock synchronizing method and system

A clock synchronization, microsecond-level technology, applied in the field of network communication, can solve the problem of few method designs, achieve the effect of simplifying node equipment design, ensuring accuracy requirements, and improving synchronization accuracy

Active Publication Date: 2016-03-23
CENT SOUTH UNIV
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Problems solved by technology

However, in the prior art, there are few overall architecture and method designs for large-scale network d...

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  • SOPC (System on a Programmable Chip) networking based sub-microsecond level clock synchronizing method and system
  • SOPC (System on a Programmable Chip) networking based sub-microsecond level clock synchronizing method and system
  • SOPC (System on a Programmable Chip) networking based sub-microsecond level clock synchronizing method and system

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Embodiment Construction

[0030] In order to make the technical problems, technical solutions and beneficial effects solved by the present invention clearer, the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0031] For the problems existing in the prior art, the present invention proposes a detailed design scheme for the clock synchronization system of a large-scale control system, based on the Zynq platform of the on-chip programmable system SOPC, the design of the clock synchronization module using the PTP protocol provides specific The implementation plan supports Gigabit Ethernet and optical fiber transmission. At the same time, the non-deterministic network delay is corrected, and the crystal oscillator drift of the slave clock node is also frequency compensated to achie...

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Abstract

The invention provides an SOPC (System on a Programmable Chip) networking based sub-microsecond level clock synchronizing method. The clock synchronizing method comprises the steps of synchronizing UTC (Universal Time Coordinated) of a remote reference primary parent clock with UTC from an external GPS (Global Positioning System) clock or a Big Dipper system clock; synchronizing each node of a local first-level PTP (Precision Time Protocol) domain with the remote reference primary parent clock through a network switching device which supports a transparent clock function; receiving an optimal primary clock from a network at the same level by each Zynq platform based slave clock which supports IEEE158V2 protocol and gigabit Ethernet for time synchronization and frequency synchronization; when a PTP domain at the next level synchronizes with the primary parent clock through a border clock, performing clock synchronization by a primary clock at the upper level; and during the period that the PTP domain at the same level masters an independent clock synchronization control right, selecting the optimal primary clock as the primary clock of the network at the same level through an optimal primary clock algorithm. The invention also provides an SOPC networking based sub-microsecond level clock synchronizing system which adopts the clock synchronizing method.

Description

technical field [0001] The present invention mainly relates to the technical field of network communication, in particular, to a sub-microsecond clock synchronization method and system based on SOPC (System on a Programmable Chip, Programmable System on Chip) networking. Background technique [0002] With the rapid development of network technology, distributed networks have been widely used in various industries, and each distributed controller in the distributed network has higher and higher requirements for time synchronization accuracy. At present, in the field of communication, the time requirements of the power grid systems in various regions are unified, military aerospace devices and other fields have put forward microsecond-level requirements for time synchronization. In the field of network finance, online banking transactions, stock market securities Transactions also require high-precision time synchronization, especially the large-scale PLC (Programmable Logic C...

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Application Information

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IPC IPC(8): H04J3/06
CPCH04J3/0644H04J3/0667
Inventor 阳春华谢攀攀徐德刚刘育峰赵茂行蔡海明谢永芳桂卫华王晓丽
Owner CENT SOUTH UNIV
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