Non-normal power failure emergency processing circuit

Abstract

The invention provides a non-normal power failure emergency processing circuit, comprising an emergency power supply circuit and a power failure state detection circuit, wherein the emergency power supply circuit comprises a capacitor, a diode and a triode, and the power failure state detection circuit comprises three voltage detection chips. The working principle of the non-normal power failure emergency processing circuit provided by the invention is as follows: the emergency power supply circuit provides a power supply for the action necessary for the emergency processing after power failure, and the power failure state detection circuit judges the power failure state. A group of voltage state signals can be obtained by the combination of the three voltage detection chips, and ''and'' and ''or'' logical conclusions can be formed by different circuit combination modes. The non-normal power failure emergency processing circuit provided by the invention provides power supply for a subsequent processing circuit via the emergency power supply circuit composed of one capacitor, one diode and one triode, and accurately judges the power failure state via the combination of the three voltage detection chips, so the non-normal power failure of an automotive electronic system can be judged quickly.

Description

Technical field: [0001] The invention relates to the field of electricity, in particular to an electronic circuit, in particular to an emergency processing circuit for abnormal power failure. Background technique: [0002] Unexpected abnormal power loss often occurs in electronic systems. In automotive systems, abnormal power loss affects the safety of electronic equipment. In the prior art, micro-processing is used to judge normal power-off or power-off status, which can handle complex logical judgments, and can distinguish between sudden power-off and normal power-off, but the AD sampling time is too long and depends on the software processing speed , can not meet the requirements of fast response; for example, the AD sampling time is generally 80ms to 100ms, otherwise the power-off process will be completed within 10m; it is easy to trigger misoperation, and the microprocessor consumes a lot of power, which reduces the power failure on the other hand. processing time. I...

AI Technical Summary

Problems solved by technology

[0003] In the case of a sudden unexpected power failure, the electronics can perform relatively simple emergency treatment actions. These emergency treatment actions still need some flag bit information of the state before the power failure as the basis for processing. It loses energy supply and cannot work; reading non-volatile memory, such as EEPROM, etc., consumes a lot of power, up to several mA, and also needs to support I2C or SPI protocol chip reading, this level of chip consumes a lot of power, The price is also more expensive

Therefore, it is not suitable for emergency treatment; the sudden power failure time is very short, and the response speed is not enough; therefore, it is difficult to carry out reliable emergency treatment actions

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