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usb line power supply system and usb line power supply method

A technology of power supply and USB interface, which is applied in the direction of data processing power supply, electrical digital data processing, measuring device, etc., and can solve the problem of high circuit cost

Active Publication Date: 2017-11-10
APPOTECH
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In this method, an external low-dropout linear voltage regulator is installed on the chip 43, and the external low-dropout linear voltage regulator is used to bear the power consumption and heat generation of 5 volts to 3.3 volts and 5 volts to 1.2 volts, thereby reducing the power dissipation of the chip itself. However, using an external low-dropout linear regulator to supply power requires an additional external low-dropout linear regulator, resulting in high circuit costs

Method used

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  • usb line power supply system and usb line power supply method
  • usb line power supply system and usb line power supply method
  • usb line power supply system and usb line power supply method

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Embodiment Construction

[0034] see Figure 5 , Figure 5It is a schematic diagram of the circuit structure of the embodiment of the present invention. The power supply system of the present invention includes an off-chip resistor array 100, an on-chip gating switch array 200, an on-chip voltage detector 300, a first on-chip low-dropout linear regulator 400, and a second on-chip low-dropout linear regulator 500 , On-chip resistor R3 and off-chip resistor R2. Wherein, USB interface 1 is electrically connected with off-chip resistor array 100, and off-chip resistor array 100 includes resistor R1a, resistor R1b, resistor R1c and resistor R1d, on-chip strobe switch array 200 includes switch SW1a, switch SW1b and The switch SW1c, the resistor R1d is connected to the first end of the switch SW1a, the resistor R1a and the resistor R1c are connected in parallel to both ends of the resistor R1d and connected to the first end of the switch SW1b, the resistor R1b is connected in parallel to the resistor R1c an...

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Abstract

The invention provides a USB power supply system and method. The power supply system comprises a USB interface, an off-chip resistor array and a chip. The chip comprises an on-chip gating switch array, an on-chip voltage detector, a first on-chip low-dropout linear voltage stabilizer and a second on-chip low-dropout linear voltage stabilizer. The USB interface is connected to the on-chip gating switch array through the off-chip resistor array. Switches in the on-chip gating switch array are connected to the input end of the on-chip voltage detector. The output end of the on-chip voltage detector is connected to a logic circuit of the on-chip gating switch array. The switches in the on-chip gating switch array are connected to the input end of the first on-chip low-dropout linear voltage stabilizer. In the method, the USB power supply system is applied. An extra LDO chip or a power inductor is not needed, a complicated internal circuit design is not needed either, heat dissipation of the chip can be reduced just through a plurality of resistors, and cost is lowered.

Description

technical field [0001] The invention relates to the field of power supply systems, in particular to a power supply system for reducing the calorific value of a USB line power supply chip and a method for reducing the calorific value of the USB line power supply chip. Background technique [0002] With the development of integrated circuit technology, the expansion of chip scale, the improvement of speed and the improvement of functional complexity all have higher and higher requirements on the power consumption of the chip itself. In addition, the packaged chip has thermal resistance, that is, the power consumed by the chip is increased, which further increases the power dissipation of the chip. If the thermal potential difference between the internal environment of the package chip and the external environment of the package chip is greater, and under the same ambient temperature, it means that the temperature of the chip itself is higher. Since the maximum operating tempe...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F1/26
CPCG06F1/266
Inventor 熊正东
Owner APPOTECH