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Multilevel IDWT (Inverse Discrete Wavelet Transform) parallel processing method and system

A parallel processing and coefficient technology, applied in the image field, can solve problems such as image playback time delay, and achieve the effects of reducing complexity, high efficiency, and saving storage resources

Active Publication Date: 2016-04-13
北京优素科技有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In this way, the wavelet coefficient memory not only needs to reserve a storage area for the processing results of the IDWT engine, but also needs to reserve sufficient storage bandwidth for writing back the processing results of the IDWT engine and outputting the processing results of the multi-level IDWT; at the same time, this multi-level IDWT The processing method will also generate a delay of at least one frame of image playback time

Method used

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  • Multilevel IDWT (Inverse Discrete Wavelet Transform) parallel processing method and system
  • Multilevel IDWT (Inverse Discrete Wavelet Transform) parallel processing method and system
  • Multilevel IDWT (Inverse Discrete Wavelet Transform) parallel processing method and system

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Embodiment 1

[0057] The multi-level IDWT parallel processing system includes a wavelet coefficient memory, a wavelet coefficient distributor, multiple wavelet coefficient line buffers and multiple IDWT calculation engines, wherein each level of IDWT corresponds to a wavelet coefficient line buffer and an IDWT calculation engine.

[0058] Taking the four-level IDWT as an example, the overall structure of the multi-level IDWT parallel processing method is as follows: Image 6 shown.

[0059] Among them, the wavelet coefficient allocator extracts the wavelet coefficients of each wavelet decomposition level from the wavelet coefficient memory according to the wavelet coefficient allocation strategy, and stores them in the corresponding wavelet coefficient line cache, and the IDWT calculation engine sequentially reads wavelet coefficients from the wavelet coefficient line cache The coefficient row is processed by IDWT, the LL0 wavelet coefficient generated by the IDWT calculation engine of the ...

Embodiment 2

[0064] The multi-stage IDWT parallel processing system includes a wavelet coefficient memory, a wavelet coefficient distributor, a wavelet coefficient line buffer and an IDWT calculation engine.

[0065] Taking the four-level IDWT as an example, the overall structure of the multi-level IDWT parallel processing method is as follows: Figure 7 shown.

[0066] Specifically, the wavelet coefficient allocator extracts the wavelet coefficients of each wavelet decomposition level from the wavelet coefficient memory according to the wavelet coefficient allocation strategy, and stores them in the wavelet coefficient line cache, and the IDWT calculation engine extracts the wavelet coefficients from the wavelet coefficient The wavelet coefficient lines are read sequentially from the line buffer for IDWT processing. The wavelet coefficients generated by the wavelet coefficient lines of the first wavelet decomposition level are used as the output of multi-level IDWT, and the LL1, LL2, and ...

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Abstract

The invention discloses a multilevel IDWT (Inverse Discrete Wavelet Transform) parallel processing method and system. The multilevel IDWT parallel processing system comprises a wavelet coefficient memory, a wavelet coefficient distributor, at least one wavelet coefficient line buffer and at least one IDWT calculation engine. The method comprises the following steps that the wavelet coefficient distributor extracts a wavelet coefficient of each wavelet decomposition level from the wavelet coefficient memory according to a wavelet coefficient distribution strategy and stores into the corresponding wavelet coefficient line buffer; the IDWT calculation engine reads the wavelet coefficient lines from the wavelet coefficient line buffer in sequence according to an order provided by the wavelet coefficient distribution strategy in order to carry out IDWT processing, and the multilevel IDWT parallel processing is realized through at least one IDWT calculation engine. According to the multilevel IDWT parallel processing method and system, the memory capacity and the memory bandwidth are reduced, the storage resource is saved and the time delay is greatly reduced; and furthermore, the method and the system have the advantages of good expansibility and high efficiency.

Description

technical field [0001] The present invention relates to the field of image technology, in particular to a multi-level IDWT parallel processing method and system in the JPEG2000 decoding process based on FPGA. Background technique [0002] At present, with the continuous improvement of digital shooting technology and digital storage technology, the resolution of images based on JPEG2000 encoding format is getting higher and higher, from standard definition images and high definition images of traditional TVs, to digital movie 2K images and 4K images, and Medical images and satellite remote sensing 8K or even 16K images; at the same time, the playback frame rate of images based on the JPEG2000 encoding format is getting higher and higher, and the 2K images of digital movies have been expanded from 24 frames per second to 25 frames per second, 30 frames per second, and 50 frames / s or 60 frames / s, 4K images are expanded from 24 frames / s to 25 frames / s, 30 frames / s, digital TV f...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N19/63H04N19/635H04N19/436H04N19/426
Inventor 白云祥赵中伟李海洲
Owner 北京优素科技有限公司
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