Method and devices for time and frequency synchronization using a phase locked loop
A digital phase-locked loop, time technology, used in synchronization devices, automatic power control, multiplexing communication, etc., can solve problems such as clock signal deterioration
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[0080] Development of basic clock models and measurement and processing models
[0081] Consider the time server (master) clock S and the time client (slave) clock C separately. The difference or offset of clock C relative to S at time t≥0 is θ(t)=(S(t)−C(t)). t is used to indicate real or reference (ideal) time. Frequency is the rate at which a clock advances, and the frequency of S at time t is s'(t). Skew α is defined as the normalized frequency difference between a clock and another clock. Generalized clock skew and skew equations can then be defined for synchronization problems. Assuming at any particular moment, an instantaneous diagram of the relationship between a master (server) clock with timeline S(t) and a slave (client) clock with timeline C(t) can be given by Figure 5 is described by the known simple skewed clock model shown, and is described by the following equation,
[0082] S(t)=(1+α)C(t)+θ, (1)
[0083] Among them, the normalized α is a very small quan...
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