Storage structure and preparation method thereof

Abstract

The invention provides a storage structure and a preparation method thereof. The preparation method comprises the following steps of: providing a semiconductor substrate, wherein a plurality of interlay medium layers and virtual medium layers which are overlapped in a staggered manner are formed on the surface of the semiconductor substrate, and the virtual medium layers are formed between adjacent interlay medium layers; etching the interlay medium layers, the virtual medium layers and a part of the semiconductor substrate so as to form grooves; forming epitaxial layers at the bottoms of the grooves, wherein the upper surfaces of the epitaxial layers do not exceed the upper surfaces of the interlay medium layers; sequentially forming partitioning medium layers and polycrystalline silicon layers on side walls of the grooves. According to the storage structure, as the epitaxial layers are only formed at the bottoms of the grooves, the time for selective extension is shortened, and meanwhile a photomask process can be reduced. In addition, the upper surfaces of the epitaxial layers do not exceed the upper surfaces of the interlay medium layers, so that the total height of the interlay medium layers and the virtual medium layers on the semiconductor substrate can be reduced. The storage structure is relatively good in controllability of threshold voltage of a selecting grid in programming operation of a memory.

Description

technical field [0001] The invention relates to the technical field of flash memory, in particular to a storage structure and a preparation method thereof. Background technique [0002] With the development of planar flash memory, the production process of semiconductors has made great progress. However, in recent years, the development of planar flash memory has encountered various challenges: physical limits, existing development technology limits, and storage electron density limits. In this context, in order to solve the difficulties encountered in planar flash memory and pursue lower production costs per unit storage unit, various three-dimensional (3D) flash memory structures have emerged, such as 3D NAND flash memory. [0003] The memory formed in the prior art adopts a selective epitaxial process, and an epitaxial layer is formed in the memory structure to reduce the current of the memory unit. refer to figure 1 As shown in , on the surface of the substrate 10 are...

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a storage structure and its preparation method, which solves the problems of thicker epitaxial layers increasing process difficulty and large thickness of interlayer dielectric layer in the prior art

Images