One-bit full adder based on Fin FETs

Abstract

The invention discloses a one-bit full adder based on Fin FETs. The one-bit full adder comprises first to twenty Fin FETs. The first Fin FET, the second Fin FET, the fifth Fin FET, the seventh Fin FET, the ninth Fin FET, the twelfth Fin FET, the thirteenth Fin FET, the fifteenth Fin FET, the seventeenth Fin FET, and the nineteenth Fin FET are P-type Fin FETs. The third Fin FET, the fourth Fin FET, the sixth Fin FET, the eighth Fin FET, the tenth Fin FET, the eleventh Fin FET, the fourteenth Fin FET, the sixteenth Fin FET, the eighteenth Fin FET, and the twentieth Fin FET are N-type Fin FETs. The one-bit full adder is low in circuit area, time delay, power consumption, and power consumption time delay product.

Description

technical field [0001] The invention relates to a one-bit full adder, in particular to a one-bit full adder based on a FinFET tube. Background technique [0002] As a basic unit of an electronic system, a full adder can not only complete addition, but also participate in operations such as subtraction, multiplication, and division, and is widely used in large-scale integrated circuit design. The full adder is an important unit of a digital signal processor, a microprocessor, and a single-chip microcomputer system with relatively high performance requirements. The performance of the full adder has a particularly important impact on the performance of the entire system. One-bit full adder is widely used in the carry critical path of multi-bit adder, and is one of the important factors affecting multi-bit adder. FinFET tube (Fin Field-Effect Transistor, Fin Field-Effect Transistor) is a complementary metal oxide semiconductor (CMOS) transistor, which has the advantages of high...

AI Technical Summary

Problems solved by technology

The one-bit full adder uses static complementary logic to generate the sum signal and the high-order carry signal output. A large number of N-type FinFET tubes and P-type FinFET tubes are used in the sum signal generation path and the high-order carry signal generation path. The one-bit full adder It is composed of 28 FinFET tubes, which increases the circuit area, delay and power consumption of a full adder. In addition, the low-order carry signal input terminal is set closer to the sum signal output terminal and the high-order carry signal output terminal. Although It can speed up the operation speed of one-bit full adder to a certain extent, but it will cause one-bit adder to have a larger load capacitance, which will further increase power consumption and increase the delay of the high-order carry signal generation path, so that the one-bit full adder Larger circuit area, delay, power consumption, and power-delay product (PDP)

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