Railway hump vehicle decelerator performance detection system

A detection system and reducer technology, which is applied in the direction of machine gear/transmission mechanism testing, etc., can solve the problems of low detection success rate, labor and material resources consumption, and limited staff ability, so as to facilitate management, improve detection efficiency, and manpower Good machine interface

Inactive Publication Date: 2016-10-26
SHANGHAI UNIV
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  • Claims
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Problems solved by technology

On the one hand, due to the limited capacity of the staff, the detection success r...

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  • Railway hump vehicle decelerator performance detection system
  • Railway hump vehicle decelerator performance detection system
  • Railway hump vehicle decelerator performance detection system

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Embodiment Construction

[0026] Below in conjunction with accompanying drawing, preferred implementation of the present invention is described in further detail:

[0027] see figure 1 , the railway hump vehicle reducer performance detection system of the present invention comprises an ARM processor module 1, an FPGA processor module 2, an Ethernet module 3, a first power module 4, a second power module 5, a photoelectric code counting Module 6, a DO module 7, a DI module 8, a PWM differential output module 9, AD acquisition module 10, a serial port module 11, the Ethernet module, the first power supply module, and the serial port module are all connected to the ARM processor module; 2. Power supply module, photoelectric code counting module, DO module, DI module, PWM differential output module, AD acquisition module are connected with FPGA processor module; ARM processor module and FPGA processor module are connected through FSMC bus.

[0028] ARM processor module 1 is composed of ARM control chip, c...

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Abstract

The invention provides a railway hump vehicle decelerator performance detection system. The system comprises an ARM processor module and the like; an Ethernet module, a power module and a serial port module are connected with the processor module; the power module, a photoelectric coding counting module, a DO (Digital Output) module, a DI (Digital Input) module, a PWM (Pulse Width Modulation) differential output module and an AD (Analog to Digital) acquisition module are connected with a processor module; and the processor modules are connected by an FSMC (Fuzzy Sliding Mode Control) bus. A brand-new detection scheme is provided for the problem that the braking performance becomes worse in the long-term use process of a decelerator in a railway traffic system. By combining a digital circuit design technology, an embedded system technology and a microcomputer control technology together, the system has the advantages of high efficiency, high precision, low cost and easiness in operation. By adopting the system, railway workers can detect and timely maintain failure decelerators, and researchers of a railway system can obtain abundant data from the uploaded mass data.

Description

technical field [0001] The invention relates to a performance detection system of a railway hump vehicle reducer, which belongs to the field of railway traffic system automation. Background technique [0002] my country's reducer has been born and used for about half a century. Through the unremitting efforts of the vast number of scientific researchers, as well as the careful use and maintenance of railway staff, the reducer has become an important part of the hump speed control system. It is widely used in the hump shunting yard of the whole road. played an irreplaceable role. However, some practical problems have gradually emerged, the most prominent of which is how to judge whether the long-term use of the reducer can still be within the normal working range, otherwise it will cause inconvenience to the position of the railway vehicle. The traditional detection method is to rely on the traditional experience of railway workers, such as manual trampling. On the one han...

Claims

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Application Information

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IPC IPC(8): G01M13/02
CPCG01M13/02
Inventor 苗中华魏成雷刘金磊徐舟舟刘冲李晖
Owner SHANGHAI UNIV
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