Staggered pixel non-refrigeration infrared focal plane array reading-out circuit

Abstract

The invention relates to the field of reading-out integration circuits, in particular to a staggered pixel non-refrigeration infrared focal plane array reading-out circuit. The circuit comprises a sensor array and row selection switching unit which comprises sensor resistors, a sensor bias and signal integral amplification circuit for sampling and holding output signals and a multi-stage output buffer unit composed of a plurality of output buffers. The sensor resistors are repeatedly staggered and arranged on a two-dimensional plane. The end-to-end connection structure is adopted in each column. The sensor bias and signal integral amplification circuit comprises a sensor bias voltage, sampling capacitors, an integrator and two cascade saturation tubes. The buffer unit is used for outputting the voltage of the sampling capacitors on each column to an IO column by column. The invention further provides a signal reading-out method. In short, according to the reading-out circuit, on the basis of derangement of pixels, the pixel quality is greatly improved, while the area of a chip die is kept constant, noise is lowered, power consumption is lowered, and the uniformity and yield of sensors are improved.

Description

technical field [0001] The invention relates to the field of readout integrated circuits, in particular to an uncooled infrared focal plane array readout circuit with interleaved pixels. Background technique [0002] The infrared focal plane array is the core component of the infrared thermal imaging system, which consists of two parts: an infrared detector and a readout circuit. The existing array structure is that the pixels form a focal plane array in a horizontal, flat and vertical manner, and the pixels in each row are biased at the same time, and the common readout circuit for each column is used to realize the integral amplification, sampling and holding, and output column by column of the pixels in each row. The output adopts the form of multi-level buffer, each level is the buffer of unit negative feedback, and the driving ability increases step by step. [0003] However, when the existing array structure is used for large array imaging such as 720*540 or 1024*768,...

AI Technical Summary

Problems solved by technology

[0003] However, when the existing array structure is used for large array imaging such as 720*540 or 1024*768, the area occupied by the sensor is too large. With the increase in the number of pixels, the uniformity and yield of the sensor are difficult to achieve

[0004] In addition, the multi-level unit negative feedback buffer structure increases the chip area, which not only increases the noise, but also consumes a lot of power

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