Formation method of semiconductor structure

Abstract

Provided is a formation method of a semiconductor structure. The method includes steps: providing a semiconductor substrate, wherein the semiconductor substrate comprises a fin structure; forming a grid electrode structure across the fin structure on the semiconductor substrate; and forming protective layers on the surfaces of the grid electrode structure, the fin structure, and the semiconductor substrate. Ion implantation is performed on the fin structure, the annealing process is then adopted, ions are pushed into the fin structure through the protection layer, and source and drain electrode diffusion regions are formed; besides, the fin structure is prevented from being damaged after the ion implantation process so that the deviation of the electrical performance of devices is avoided.

Description

technical field [0001] The present invention relates to the field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure, in particular to a method for forming a FinFET (Fin Field effect transistor, Fin Field Effect Transistor) structure. Background technique [0002] With the development of semiconductor technology, the feature size of the device is continuously reduced, and the channel size is also continuously reduced. The planar MOS transistors in the prior art are facing more and more difficult problems related to the short channel effect. In order to solve this technical difficulty, MOS transistors with three-dimensional structures such as horizontal multi-faceted gate structure and vertical multi-faceted gate structure have gradually received widespread attention. The FinFET structure is a device with a three-dimensional structure commonly used at present, which makes the device more miniaturized and has high performance charac...

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Problems solved by technology

[0006] Based on the current semiconductor structure manufacturing technology, the ion implantation region covers the fin structure 101, but because the size of the fin structure of the current FinFET is getting smaller and smaller, when using the existing technology to perform ion implantation on the source and drain diffusion regions of the FinFET, There will be irreparable damage to the fin structure 101 after the thermal annealing process, which will cause the electrical performance deviation of the FinFET device

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