Auto-collimation injection manufacturing method for CMOS image sensor

Abstract

The invention discloses an auto-collimation injection manufacturing method for a CMOS image sensor. An injection protection layer is used for protecting other areas except a pass transistor and a light-sensitive zone PN node, a first sacrificial layer is deposited on the injection protection layer, so that P type impurity injection of the pass transistor can be completed after graphical processing on the first sacrificial layer to form an injection window; and then a second sacrificial layer is deposited and flattened to remove the first sacrificial layer exposed by the light-sensitive zone, and the second sacrificial layer is used as a mask layer of a P type impurity region of the transport transistor, so that pattern transfer is completed and height alignment is realized. Therefore, when follow-up N type and P type injection of the light-sensitive zone PN node is carried out, overlapping or separation of the P type impurity region of the transport transistor and the N type and P type injection regions of the light-sensitive zone PN node can be avoided, so that adverse effects on the dark current and dark light response by inaccurate alignment can be reduced.

Description

technical field [0001] The invention relates to the technical field of integrated circuit manufacturing and processing, and more specifically, relates to a self-aligned implantation manufacturing method when performing N-type impurity implantation in the photosensitive region of a CMOS image sensor and P-type impurity implantation in a transfer transistor. Background technique [0002] CMOS image sensors are widely used in monitoring, photography and other fields. The most basic element of a CMOS image sensor is a PN junction photodiode and a transfer transistor connected to it. The electrical requirement of the transfer transistor is that it cannot penetrate the N-type impurity region of the photosensitive region of the PN junction, including surface penetration and subsurface penetration, otherwise it will affect the dark current and the number of electrons that the PN junction can accommodate. The electrical requirement of the photosensitive region of the PN junction is ...

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Problems solved by technology

[0005] 1) If the injection lithography window LTR of the transfer transistor covers the injection lithography window LNPPD of the photosensitive area, it will cause the P-type impurity implantation area of ​​the transfer transistor to over-cover the N-type impurity injection area of ​​the PN junction, resulting in polysilicon in the photosensitive area The N-type impurity concentration under the gate becomes lower, and causes a potential barrier in the electron channel between the gate silicon oxide layer and the N-type impurity implantation region; this will affect the dark light response of the device

[0006] 2) If the injection lithography window LNPPD of the photosensitive area covers the injection lithography window LTR of the transfer transistor, it will cause the N-type impurity implantation area of ​​the PN junction in the photosensitive area to over-cover the P-type impurity injection area of ​​the transfer transistor, resulting in subsequent transmission The P-type impurity concentration under the polysilicon gate of the transistor becomes lower, so that the transfer transistor may be punched through, resulting in a decrease in the charge capacity of the PN junction in the photosensitive area; this will affect the dark current of the device and the number of electrons that can be accommodated, and there will also be a small amount of post-reset Residual electrons, leading to increased dark current

[0007] 3) If there is a gap between the injection lithography window LNPPD of the photosensitive area and the injection lithography window LTR of the transfer transistor, there will be differences between the N-type impurity implantation area of ​​the PN junction in the photo-sensing area and the P-type impurity injection area of ​​the transfer transistor. Covering the area, and making a lightly doped P-type region appear under the gate oxide, resulting in a potential barrier for the electronic channel under the gate oxide; this will also affect the dark light response of the device

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