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Structures with Thinned Dielectric Materials

A dielectric material and thinning technology, applied in the field of semiconductor structures, can solve problems such as difficulties

Inactive Publication Date: 2020-05-12
GLOBALFOUNDRIES U S INC MALTA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In practice, however, making such adjustments would be difficult using existing technology

Method used

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  • Structures with Thinned Dielectric Materials
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  • Structures with Thinned Dielectric Materials

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Embodiment Construction

[0016] The present invention relates to semiconductor structures, and more particularly to structures having thinned dielectric materials and methods of fabrication. More specifically, the present invention is directed to, for example, HfO 2 Atomic (selective) etching of high-k dielectric materials (HfO2) using high temperature TiCl 4 TiN, used to shrink the size of nFET and pFET devices. Helpfully, in specific embodiments, the methods described herein improve the reliability of sized devices by, in one implementation, using thicker HfO 2 Improved pFET negative bias temperature instability (nBTI) and thinner HfO 2 Improve nFET positive bias temperature instability (pBTI).

[0017] In a specific embodiment, atomic layer deposition (ALD) of TiN is performed at high temperature using TiCl 4 (Titanium tetrachloride) precursor for preparation. As an example, HCl (hydrochloric acid) is the precursor of TiCl during the deposition of TiN (titanium nitride). 4 with precursor NH ...

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Abstract

The disclosure relates to semiconductor structures and, more particularly, to structures with thinned dielectric material and methods of manufacture. The method includes depositing a high-k dielectric on a substrate. The method further includes depositing a titanium nitride film directly on the high-k while simultaneously etching the high-k dielectric.

Description

technical field [0001] The present invention relates to semiconductor structures, and more particularly to structures having thinned dielectric materials and methods of fabrication. Background technique [0002] The trend in modern integrated circuit manufacturing is to produce semiconductor devices, such as field effect transistors (FETs), that are as small as possible. In a general FET, the source and drain are formed in the active region of the semiconductor substrate by implanting n-type or p-type impurities in the semiconductor material. Interposed between the source and drain is a channel (or body) region. Disposed over the body region is a gate electrode. The gate electrode is separated from the body by a gate dielectric layer. [0003] While making smaller transistors allows more transistors to be placed on a single substrate to form relatively large circuitry in a relatively small die area, such size reductions improve performance but also reduce reliability . ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/092H01L21/8238H01L29/51
CPCH01L21/823857H01L27/092H01L29/517H01L21/28088H01L21/28185H01L21/31122H01L21/823842H01L29/4966H01L21/02181H01L21/28194H01L21/28556H01L21/31111H01L27/0922
Inventor R·鲍T·安多A·达斯古普塔K·赵U·权S·A·克里希南
Owner GLOBALFOUNDRIES U S INC MALTA