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Three-dimensional network-on-chip dynamic frequency regulation method based on prediction

An on-chip network and dynamic frequency technology, which is applied to architectures with a single central processing unit, instruments, and general-purpose stored-program computers, can solve problems such as greatly affecting system performance, improve flexibility, improve timeliness, and reduce system costs. The effect of energy reduction

Active Publication Date: 2017-05-10
NAT UNIV OF DEFENSE TECH
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Problems solved by technology

[0009] However, the above adjustment method is only a dynamic frequency adjustment method for a two-dimensional plane, and it is a global adjustment, which has a great impact on the performance of the entire system.

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  • Three-dimensional network-on-chip dynamic frequency regulation method based on prediction
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  • Three-dimensional network-on-chip dynamic frequency regulation method based on prediction

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Embodiment Construction

[0035] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0036] As shown in Fig. 1, the method for adjusting the dynamic frequency of the three-dimensional network-on-chip based on the prediction of the present invention, the steps are:

[0037] S1: System partitioning of the 3D network on chip;

[0038] Divide the whole system into several areas, and each area is called a frequency adjustment area. Each node in the area uses the same clock signal, while nodes belonging to different areas use different clock signals. Clock signals in different areas can be adjusted according to corresponding requirements. Use the same or different clock frequencies. The partitioned system can perform distributed frequency adjustment or global frequency adjustment according to the actual situation, thereby reducing the performance overhead caused by dynamic frequency adjustment.

[0039] The principle of t...

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Abstract

The invention discloses a three-dimensional network-on-chip dynamic frequency regulation method based on prediction. The method includes the steps that firstly, a three-dimensional network-on-chip is subjected to system partitioning; a whole system is divided into multiple partitions, and each partition is a frequency regulating partition; secondly, the system temperature of the three-dimensional network-on-chip is predicted; in the running process of the system, input power of each processing node of each partition and data information of real-time temperature are collected, the temperature of the next moment node is predicted and computed, and an excessively high temperature signal or a reset signal is generated according to whether a prediction result exceeds a threshold temperature or not; thirdly, the frequency of the three-dimensional network-on-chip is regulated; after a temperature prediction signal is received, corresponding frequency regulation measures are taken on different partitions. The method has the advantages of being simple in principle, flexible, efficient, capable of guaranteeing system overall performance and the like.

Description

technical field [0001] The invention mainly relates to the field of microprocessor design, in particular to a prediction-based three-dimensional on-chip network dynamic frequency adjustment method. Background technique [0002] In order to meet people's increasing performance requirements for microprocessors, the design of microprocessors has also undergone changes from single-core, multi-core to many-core. With the increase of the number of microprocessor cores, the traditional bus-based interconnection communication method has gradually become the bottleneck of system performance. Network on Chip (NoC) is widely used as a new interconnection communication method. The three-dimensional network-on-chip (3D NoC) is the third-dimensional extension of the ordinary NoC, which has higher bandwidth and is an ideal many-core interconnection communication solution. [0003] However, stacking more processing units on the same chip increases the power density, and also increases the ...

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F15/78G06F1/20
CPCG06F1/206G06F15/7825
Inventor 彭元喜海月雷元武郭阳鲁建壮李勇田甜王建之贾宝东舒雷志张松松朱保周张榜
Owner NAT UNIV OF DEFENSE TECH
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