Bus fault injection system based on DSP and FPGA

A technology for injecting system and bus faults, applied in faulty hardware testing methods, detecting faulty computer hardware, instruments, etc., can solve problems such as incomplete coverage of signal fault injection, achieve good visual interface, strong flexibility, and simplify circuits The effect of the design

Inactive Publication Date: 2017-05-31
NANJING UNIV OF SCI & TECH
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] Most of the existing test methods adopt the forward test mode to test the output response to the input stimulus; even if some existing test methods adopt fault injection, they only perform fault simulation at the physical level and protocol level. Inject short circui

Method used

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  • Bus fault injection system based on DSP and FPGA
  • Bus fault injection system based on DSP and FPGA
  • Bus fault injection system based on DSP and FPGA

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Example Embodiment

[0032] Example

[0033] Such as figure 1 As shown, the bus fault injection system based on DSP and FPGA can configure the required fault mode through the fault injection unit connected to the bus system without changing the signal of the test equipment and the device under test that provide the excitation source. , Change the communication signal to realize the function of adding various faults in the normal communication of the bus equipment in real time.

[0034] Such as figure 2 with Figure 7 , DSP and FPGA-based bus fault injection system includes two parts: the upper computer and the lower computer. The upper computer uses the Kingview design to provide a human-computer interaction interface to receive the fault commands issued by the operator and send the fault commands to the lower machine. After the lower computer is powered on, first initialize DSP, FPGA, W5300, etc., and then set the serial signal receiving baud rate according to the actual communication baud rate, wai...

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Abstract

The invention discloses a bus fault injection system based on DSP and FPGA. The system comprises a DSP main processor, an FPGA, a principal computer, an Ethernet interface module, a DA module, an RS422 interface module, an RS485 interface module, a relay network, a resistance network and a storage module; the required fault mode is configured through a serial connection in a bus system, the RS422/RS485 interface module is used for receiving the serial signals of the bus, the serial signals are transformed into parallel signals by FPGA, after the signals are processed by DSP, and fault injection signals are outputted by the DA module and the relay network controlled by FPGA. According to the bus fault injection system, the hardware fault injection is adopted, the fault injection functions of a physical layer, an electric gas layer and a protocol layer can be achieved, so that faults occurred in the actual running process of the hardware are simulated more real, and various faults are added in real time in the normal communications of the bus equipment.

Description

technical field [0001] The invention relates to fault injection technology, in particular to a bus fault injection system based on DSP and FPGA. Background technique [0002] In recent years, RS-422 and RS-485 buses have been widely used because of their high real-time and high flexibility, but in practical applications, to ensure the high reliability of the bus system, bus testing is essential. [0003] Most of the existing test methods adopt the forward test mode to test the output response to the input stimulus; even if some existing test methods adopt fault injection, they only perform fault simulation at the physical level and protocol level. Inject short circuit, open circuit, series / parallel impedance, signal replacement, signal delay and other digital part faults, and the fault injection coverage of the analog part of the signal is not comprehensive, and the actual bus operation will face various states and environmental changes . Contents of the invention [000...

Claims

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Application Information

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IPC IPC(8): G06F11/22G06F11/263
CPCG06F11/2273G06F11/263
Inventor 李旭秦华旺田杰笪力李宝徐杨
Owner NANJING UNIV OF SCI & TECH
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