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DAC Offset Error Calibration Circuit Based on Charge Domain Signal Processing

A signal processing and error calibration technology, applied in electrical signal transmission systems, signal transmission systems, analog/digital conversion calibration/testing, etc., can solve the problem that the compensation system cannot meet the accuracy requirements, and achieve the effect of low power consumption

Active Publication Date: 2021-05-07
HUANGSHAN UNIV
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  • Abstract
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  • Claims
  • Application Information

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Problems solved by technology

In applications that require precise control of the DC offset compensation current, the general compensation system cannot meet the accuracy requirements

Method used

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  • DAC Offset Error Calibration Circuit Based on Charge Domain Signal Processing
  • DAC Offset Error Calibration Circuit Based on Charge Domain Signal Processing
  • DAC Offset Error Calibration Circuit Based on Charge Domain Signal Processing

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Embodiment Construction

[0039]A preferred embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

[0040]Fig. 1 is a block diagram showing a DAC offset error calibration circuit of the present invention based on charge domain signal processing. The DAC offset error calibration circuit based on the header domain signal processing includes: a current detecting resistor RD, a reference reference generating circuit, an error amplifying circuit, a k-bit analog-to-digital converter, a control circuit, and a compensation circuit.

[0041]The connection relationship of the above circuit is: the current detecting resistor RD is connected to the differential current output of the number of molded converters, and is connected to the first and second inputs of the error amplifier circuit; the reference reference generating circuit is connected to the control input. The K-bit selection output port of the circuit, the differential reference voltage output of the refe...

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Abstract

The invention provides a DAC offset error calibration circuit based on charge domain signal processing, which is characterized in that it includes: a current detection resistor Rd, a reference reference generation circuit, an error amplifier circuit, a K-bit charge domain analog-to-digital converter, a control circuit and a compensation circuit. The error calibration circuit includes a calibration mode and a compensation mode. When the circuit is working, it first enters the calibration mode and then enters the compensation mode. The error calibration circuit can automatically trade off calibration accuracy according to system accuracy and hardware overhead, and has low power consumption.

Description

Technical field[0001]The present invention relates to an error calibration circuit, specifically a DAC offset error calibration circuit using a charge domain signal processing technology.Background technique[0002]The digital-to-analog converter (DAC) is an electronic circuit that converts the input digital signal to output an analog signal. The value represented by the digital signal input to the DAC corresponds to the amplitude of the analog signal output by the DAC. Various factors determine the performance of the DAC, including speed, resolution, and noise. Speed ​​refers to the time required to convert numeric values ​​into a stable analog signal.[0003]High-performance DAC is very useful for high-resolution data with high frequency and low noise. The current rudder structure is a structure for rapid sampling applications, wherein each bit or converted data bit is used to convert a source from a source from a source from a source from a pair of nodes. The stability of high-speed ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H03M1/00H03M1/10H03M1/66
CPCH03M1/002H03M1/1023H03M1/66
Inventor 陈珍海吕海江苏小波万书芹何宁业宁仁霞鲍婕
Owner HUANGSHAN UNIV
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