A kind of thin film transistor and its preparation method, array substrate, display device

Abstract

The embodiment of the invention provides a thin film transistor, a preparation method of the thin film transistor, an array base plate and a display device. An active layer is connected with a source electrode metal layer and a drain electrode metal layer in the thin film transistor through an Ohmic contact layer, so that the Ohmic contact resistance between the active layer, and the source electrode metal layer and the drain electrode metal layer is reduced; the Ohmic contact effect between the active layer, and the source electrode metal layer and the drain electrode metal layer in the thin film transistor is improved; further, the work stability of the thin film transistor can be improved. The embodiment of the invention provides the thin film transistor, which comprises the source electrode metal layer, a first insulation layer, the drain electrode metal layer, the active layer and the Ohmic contact layer, wherein the first insulation layer is arranged above the source electrode metal layer; the drain electrode metal layer is arranged above the first insulation layer; the active layer is connected with the source electrode metal layer and the drain electrode metal layer through the Ohmic contact layer; the Ohmic contact layer comprises a first Ohmic contact layer and a second Ohmic contact layer; the first Ohmic contact layer comprises a first partial region and a second partial region which are positioned at two sides of the first insulation layer.

Description

technical field [0001] The present application relates to the field of communication technology, and in particular to a thin film transistor and a manufacturing method thereof, an array substrate, and a display device. Background technique [0002] At present, high-resolution display products have become the mainstream trend in the market. To achieve high-resolution display of liquid crystal display panels, the requirements for pixel aperture ratio are getting higher and higher. Therefore, reducing the size of thin film transistors (Thin Film Transistor, TFT) has become particularly critical. . In the prior art, there is a vertical TFT structure, which can greatly reduce the size of the TFT, such as figure 1 As shown, the vertical TFT structure includes: a glass substrate 1, a buffer layer 2, a pixel layer 3, a source metal layer 4, a first insulating layer 5, a drain metal layer 6, an oxide (IGZO) layer 7, a second The insulating layer 8 and the gate metal layer 9, wherei...

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Problems solved by technology

Although figure 1 The vertical TFT structure shown can greatly reduce the size of the TFT, but the vertical TFT structure is only applicable to the oxide TFT at present, and the amorphous silicon is used as the active layer in the amorphous silicon TFT, because the active layer and the source The electrode metal layer and the drain metal layer are in direct contact, so the ohmic contact of the amorphous silicon TFT is poor, resulting in poor stability of the amorphous silicon TFT

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