Column-level ADCs for cmos image sensors with hybrid CDs

Abstract

The invention relates to the field of analog integrated circuit design of microelectronics. It proposes an implementation method of a two-step monoclinic ADC using H-CDS to meet the high-speed and low-noise requirements of a CMOS image sensor for a readout circuit. The technical solution adopted in the present invention is that the CMOS image sensor column-level ADC with hybrid CDS includes a comparator, a latch, a counter, capacitors C1, C2, C3 and switches SADC1, SADC2, S1, S2 and SF, and the pixel output Connect to the upper plate of capacitor C1 and capacitor C3 through switch s1, the lower plate of capacitor C3 is grounded, and the lower plate of capacitor C1 is connected to the non-inverting input terminal of the comparator; and, the non-inverting input terminal of the comparator is connected to the non-inverting input terminal through switch s2 The output terminals of the comparators are connected, and the inverting input terminal of the comparator is connected to the ramp signal through the switch SF. The invention is mainly applied to the occasion of designing analog integrated circuits of microelectronics.

Description

technical field [0001] The invention relates to the field of analog integrated circuit design of microelectronics, in particular to a column-level ADC used for mixing CDS in a CMOS image sensor. Background technique [0002] CMOS image sensors have been widely used in applications such as digital cameras, automotive security recorders, and medical equipment. The schematic diagram of the traditional CIS structure is as follows: figure 1 , usually including pixels, correlated double sampling (CDS), analog-to-digital converter (ADC) and some digital processing modules, etc. Among these modules, the ADC is an important module that converts the analog pixel voltage value into a digital value. From the classification of ADCs, there are chip-level ADCs, column-level ADCs, and pixel-level ADCs. Generally, column-level ADCs are widely used in consideration of comprehensive speed, chip area, and power consumption. However, since each column of ADCs cannot be completely identical, ...

AI Technical Summary

Problems solved by technology

[0003] However, in the ADC using digital CDS, due to the two quantizations of the reset signal and the exposure signal of the pixel, and then the quantized digital code value is differenced to eliminate some non-ideal factors at the column level, which will greatly reduce the ADC quantization speed

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