Apparatus and method for managing breakdown of eeprom memory access transistors
A memory and memory cell technology, applied in the field of memory, can solve the problems of inappropriate consumption, limited increase in duration of erasing and programming high-voltage pulse applications, unacceptable number of programming times, etc., and achieve the effect of avoiding breakdown and leakage
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[0036] exist figure 1 In , reference numeral DISP denotes an example of an EEPROM type memory device according to the present invention.
[0037] This means DISP comprises a memory plate PM of memory cells CEL, as well as programming means MPR and erasing means MEF notably comprising means HV allowing high programming or erasing voltages to be applied, row and column decoders DECY and DECX and comprising Read device for read amplifier AMPL.
[0038] The row decoder DECY and the column decoder DECX are notably controlled by the programming means MPR and the erasing means MEF and are configured to pass through word lines and control lines WL / CGL respectively and via bit lines BL, for example by means of control blocks. A signal is sent to select a memory cell.
[0039] The means DIS also comprise control means MCM comprising, for example, logic means capable of implementing notably the conventional structure of the respective programming means MPR, erasing means MEF and readi...
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