Duty ratio correcting circuit

Abstract

The present invention discloses a duty ratio correcting circuit. The circuit comprises a first signal input end, a second signal input end, a first phase inverter, a first phase interpolator, a second phase inverter, a second phase interpolator, a first capacitor, a third phase inverter, a second capacitor, a fourth phase inverter, a first signal output end and a second signal output end. The input signal of the second signal input end is reverse in phase to the input signal of the first signal input end. The first phase inverter is connected with the first signal input end. The first phase interpolator is connected with the first signal input end. The second phase inverter is connected with the second signal input end. The second phase interpolator is connected with the second signal input end. The first capacitor is connected with the first phase interpolator. The third phase inverter is connected with the first phase interpolator. The second capacitor is connected with the second phase interpolator. The fourth phase inverter is connected with the second phase interpolator. The first signal output end is connected with the third phase inverter. The second signal output end is connected with the fourth phase inverter. The phases of higher harmonics are regulated by the first phase interpolator and the second phase interpolator and amplified to a full swing by the third phase inverter and the fourth phase inverter. According to the technical scheme of the invention, the problems of loop stability and loop compensation can be avoided.

Description

technical field [0001] The invention relates to the field of integrated circuits, in particular to a duty ratio correction circuit for correcting the duty ratio of an output signal of a differential oscillator. Background technique [0002] In the design of the oscillator, the output signal of the oscillator has different duty ratios at different frequencies. When the duty ratio of the output signal is strictly required, a duty ratio correction circuit is usually set at the output end of the oscillator. [0003] In the existing duty cycle correction circuit, the output signal of the oscillator is often filtered first to obtain a DC level signal, and then the error is amplified between the DC level signal and 1 / 2 of the power supply voltage to obtain a control signal to adjust charging or The equivalent impedance of the discharge, and then adjust the rising or falling time of the signal, thereby adjusting the duty cycle. [0004] When the signal frequency is relatively low, ...

AI Technical Summary

Problems solved by technology

[0004] When the signal frequency is relatively low, the filter capacitor of the DC level signal is usually large and has a small ripple, which will introduce jitter; and the error amplifier is always misaligned during the production process, which will cause the duty cycle The ratio cannot meet the requirements, and the circuit is more complicated, requiring a longer stabilization time

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