Formation method of semiconductor structure
A semiconductor and isolation structure technology, which is applied in the field of formation of semiconductor structures, can solve problems affecting the performance of semiconductor structures, and achieve the effect of improving the performance of semiconductor structures
Active Publication Date: 2020-02-07
SEMICON MFG INT (SHANGHAI) CORP +1
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Problems solved by technology
[0005] However, the method of forming the semiconductor structure easily affects the performance of the formed semiconductor structure
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Embodiment Construction
[0029] There are many problems in the formation method of the semiconductor structure, and the performance of the formed semiconductor structure is poor.
[0030] Combining with a method of forming a semiconductor structure, the reasons for the poor performance of the formed semiconductor structure are analyzed:
[0031] After research, it is found that as the size of the fin used to form the fin field effect transistor continues to shrink, the bottom of the source region and the drain region formed in the fin is prone to bottom punch through (punch through), and the bottom of the source region and the drain region The bottom generates a leakage current. In order to overcome the bottom punch-through phenomenon, one method is to implant anti-type ions in the region between the bottom of the source region and the drain region to isolate the bottom of the source region and the drain region.
[0032] Figure 1 to Figure 3 It is a structural schematic diagram of each step of a met...
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The invention provides a semiconductor structure forming method. The method comprises steps: a base is provided, wherein the base comprises a first transistor area and a second transistor area, and the first transistor area and the second transistor area of the base comprise a substrate and fin parts located on the substrate; a first sacrificial layer is formed on the substrate in the first transistor area, wherein the surface of the first sacrificial layer is lower than the top surface of the fin part; first ion implantation is carried out on the first sacrificial layer in the first transistor area; after the first ion implantation is carried out, the first sacrificial layer is removed; and after the first sacrificial layer is removed, annealing treatment is carried out. During the annealing treatment process, the first sacrificial layer is already removed, doped ions in the first sacrificial layer are not diffused to the fin parts in the second transistor area, the performance of thetransistor formed by the second transistor area is not influenced, and the forming method can improve the performance of the semiconductor structure.
Description
technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique [0002] With the improvement of the integration level of semiconductor devices, the critical dimensions of transistors are continuously reduced. The reduction of critical dimensions means that more transistors can be arranged on a chip, thereby improving the performance of devices. However, as the size of the transistor decreases sharply, the thickness of the gate dielectric layer and the operating voltage cannot be changed accordingly, which makes it more difficult to suppress the short channel effect and increases the channel leakage current of the transistor. [0003] The gate of the Fin Field-Effect Transistor (FinFET) has a forked 3D structure similar to a fish fin. The channel of the FinFET protrudes from the surface of the substrate to form a fin, and the gate covers the top surface ...
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IPC IPC(8): H01L21/336H01L29/78H01L21/265
Inventor 周飞
Owner SEMICON MFG INT (SHANGHAI) CORP