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RAM

A random access memory and converter technology, applied in the field of memory, can solve problems such as unreliable high-speed signals, easy distortion of signals, and distortion received by random access memory, and achieve the effect of solving transmission high-speed signal distortion, improving performance, and eliminating intersymbol interference

Active Publication Date: 2018-09-21
CHANGXIN MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] At present, the random access memory specification requires high signal transmission speed, but the signal is easily distorted under the high-speed signal transmission speed, so that the random access memory receives distorted and unreliable high-speed signals

Method used

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Examples

Experimental program
Comparison scheme
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Embodiment 1

[0089] Such as figure 1 As shown, this embodiment provides a random access memory, including a serial-to-parallel converter 120, and also includes:

[0090] The continuous-time linear equalizer 110 has a first input end that is a random access memory signal receiving end, and also has a first output end that is communicatively connected to the serial-to-parallel converter, and is used to perform channel compensation gain on the input signal and channel-compensated sending a signal to the serial-to-parallel converter;

[0091] The decision feedback equalizer 130 has a second input terminal communicatively connected to the continuous-time linear equalizer 110 and a second output terminal communicatively connected to the serial-to-parallel converter 120 for eliminating intersymbol interference of the input signal.

[0092] In this embodiment, a continuous-time linear equalizer 110 and a decision feedback equalizer 130 are provided on the random access memory. The continuous-tim...

Embodiment 2

[0126] Such as Figure 5 As shown, based on embodiment 1, the random access memory described in this embodiment also includes:

[0127] A data slicer 140, the input end of the data slicer 140 is connected to the output end of the continuous time linear equalizer 110, the output end of the data slicer 140 is connected to the input end of the decision feedback equalizer 130, for for quantizing the input signal;

[0128] A clock data recovery circuit 150, the input end of the clock data recovery circuit 150 is connected to the output end of the serial-to-parallel converter 120 for extracting phase information from the high-speed serial signal;

[0129] A phase-locked loop 160, the input of the phase-locked loop 160 is connected to the output of the clock data recovery circuit 150, the output of the phase-locked loop 160 is connected to the data slicer 140 and the decision feedback The equalizer 130 is connected to automatically control the phase synchronization of different ele...

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Abstract

A random access memory (RAM) including a deserializer is disclosed. The RAM further comprises a continuous-time linear equalizer (CTLE) including a first input terminal that receives an input signal for the RAM and a first output terminal communicatively connected to the deserializer, the CTLE configured to perform a channel gain compensation on the input signal received by the first input terminal and to transmit the compensated input signal to the deserializer. The RAM may further comprise a decision feedback equalizer (DFE) including a second input terminal communicatively connected to the CTLE and a second output terminal communicatively connected to the deserializer, the DFE configured to reduce an inter-symbol interference (ISI) of the input signal.

Description

technical field [0001] The invention relates to a memory, especially a random access memory. Background technique [0002] Random access memory (random access memory, RAM) is also called "random access memory". Random access memory is an internal memory that directly exchanges data with the CPU, also called memory. It can be read and written at any time, and the speed is very fast. It is usually used as an operating system or Temporary data storage medium for other running programs. [0003] Currently, RAM specifications require a high signal transmission speed, but the signal is easily distorted at a high-speed signal transmission speed, causing the RAM to receive distorted and unreliable high-speed signals. Contents of the invention [0004] In order to solve the above problems, the present invention provides a random access memory and a double-rate dynamic random access memory that support high-speed data transmission and maintain signal reliability during transmission...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G11C7/10
CPCG11C7/1051G11C7/1078G11C5/066G11C7/1084G11C7/1093G11C7/222G11C2207/107H03F3/193H04B10/2507H04L25/03057H04L25/03114H04L25/03159H04L25/03267H04L25/03878H04L25/14
Inventor 沈建宏
Owner CHANGXIN MEMORY TECH INC