Logic circuit for zero-relay extraction of image sharpness information in assembly line mode and extraction method

A logic circuit and assembly line technology, applied in image communication, television, electrical components, etc., can solve problems such as target tracking failure and timing delay, and achieve the effect of one-button focusing, improved integration, and real-time servo autofocus

Active Publication Date: 2018-04-13
LUOYANG INST OF ELECTRO OPTICAL EQUIP OF AVIC
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  • Abstract
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  • Application Information

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Problems solved by technology

When the operator handles multiple tasks or the distance of the detected target changes drastically, it often delays the timing and even leads to the failure of target tracking

Method used

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  • Logic circuit for zero-relay extraction of image sharpness information in assembly line mode and extraction method
  • Logic circuit for zero-relay extraction of image sharpness information in assembly line mode and extraction method
  • Logic circuit for zero-relay extraction of image sharpness information in assembly line mode and extraction method

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Embodiment Construction

[0030] Now in conjunction with embodiment, accompanying drawing, the present invention will be further described:

[0031] The visible light video source of a certain type of airborne photoelectric detection device adopts the high-definition SDI format. The front end of the visible light imaging component is equipped with a visible light video acquisition circuit, and the rear end is equipped with a digital focus control circuit. The middle section implements the logic circuit described in the present invention. The automatic focus function needs to be completed by the relevant program software associated with the present invention.

[0032] The embodiment of the present invention consists of: a pixel coordinate analysis logic circuit, a pixel value line buffer logic circuit, an image sharpness operation trigger logic circuit, a pixel-level sharpness operation logic circuit, and an image-level sharpness accumulation logic circuit, and is characterized in that: Comprehensive im...

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Abstract

The invention relates to a logic circuit for zero-relay extraction of image sharpness information in an assembly line mode and an extraction method. A field programmable gate array (FPGA) is adopted as a hardware implementation platform for image processing, and the logic circuit is divided into five parts, namely a pixel coordinate analysis logic circuit, a pixel value line buffer logic circuit,an image sharpness operation trigger logic circuit, a pixel-level sharpness calculation logic circuit and an image-level sharpness accumulation logic circuit. Time sequence signals superimposed on a high-definition video source are used, and a coordinate index value of an image pixel is reconstructed in real time for follow-up trigger control logic; through a multi-channel buffer queue mode, imagedata is grouped again, so that subsequent processing is streamlined. The logic circuit and the extraction method have the beneficial effects that the image sharpness information can be acquired by the airborne photoelectric detection system, and the airborne photoelectric detection system has a precondition of an automatic focusing function. The imaging quality, the intelligent level and the integration degree of visible light imaging components are improved.

Description

technical field [0001] The invention belongs to an image processing circuit of an airborne photoelectric detection system, and relates to a logic circuit and an extraction method for extracting image sharpness information in a pipeline mode with zero delay. Background technique [0002] Airborne photoelectric detection systems integrated with visible light imaging devices are often unable to image clearly due to factors such as the adjustment of the field of view of the visible light camera and the distance change of the detected target. The reason for this phenomenon is that the best imaging target surface of the camera lens does not coincide with the photosensitive surface of the CCD, that is, there is no accurate focus. The existing measure is to manually focus once when the system is initialized; during the normal detection process of the system, when the picture is blurred, manually perform focus compensation. The disadvantages of existing measures include heavy relian...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N5/232H04N5/208
CPCH04N5/208H04N23/67H04N23/60
Inventor 张豪刘彤
Owner LUOYANG INST OF ELECTRO OPTICAL EQUIP OF AVIC
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