Manufacturing method of 3D NAND
A manufacturing method and technology of substrate structure, applied in electrical components, electric solid state devices, circuits, etc., can solve problems such as yield reduction, device reliability and frequency reduction, and wafer scrapping.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment Construction
[0025] Exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided for more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.
[0026] Figure 3(a)-3(g) A method of forming 3D NAND according to one embodiment of the invention is shown.
[0027] First, a substrate structure is provided, which has a substrate 300 , a stepped structure 310 formed with an ON stack formed on the substrate 300 , a high density plasma (HDP) deposited layer 320 and a TEOS layer 330 covering the stepped structure 310 .
[0028] As shown in FIG. 3( a ), after the steps are formed, c...
PUM
Abstract
Description
Claims
Application Information
- R&D Engineer
- R&D Manager
- IP Professional
- Industry Leading Data Capabilities
- Powerful AI technology
- Patent DNA Extraction
Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.
© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com