LDO circuit

Abstract

The invention provides an LDO circuit. The LDO circuit comprises a reference source, a differential amplifier and an LDO output stage. The reference source provides one reference voltage and one reference current bias voltage; a first input end of the differential amplifier is connected to the reference voltage output by the reference source, a second input end of the differential amplifier is connected to the output voltage of the LDO, and the output end of the differential amplifier is connected to a grid of a power output tube of the LDO. The differential amplifier and the LDO output stageform a closed loop to make the output voltage stabilized at the reference voltage. The LDO output stage comprises a tail current source NM6 which can reduce fluctuation of the output voltage. The LDOcircuit is simple in structure, has low technological requirements and reduces the complexity of chip design.

Description

technical field [0001] The invention relates to the field of chip power management, in particular to a low power consumption linear regulator (Low Drop-out, LDO) circuit. Background technique [0002] In recent years, with the continuous development of Internet of Things technology, many devices need to be powered by batteries. In order to prolong the service life of the device, how to reduce the power consumption of the chip has become an important issue in chip design. In the use of the chip, the chip will be in a low-power standby state in many cases. At this time, a low-power LDO circuit is needed to provide power for the chip. [0003] The traditional LDO circuit is composed of a bandgap reference circuit, a differential amplifier and a resistor divider network. Its structure is as follows: figure 1 shown. The LDO circuit generates the output voltage VOUT according to the reference voltage VREF generated by the bandgap reference. After the output voltage VOUT is div...

AI Technical Summary

Problems solved by technology

[0006] In the traditional LDO circuit structure, both the bandgap reference circuit and the differential amplifier need to consume power, so there is a limit to reducing the power consumption of the traditional LDO circuit

[0007] The current required for the chip to work in the standby state will be very small. If a traditional LDO circuit is used to power it in this case, the quiescent current consumed by the LDO circuit itself may be greater than the current consumed by the chip itself.

[0008] In addition, the traditional LDO circuit structure also needs to be compensated to ensure the stability of the loop, which increases the complexity of the circuit design.

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