Capacitive coupling of integrated circuit die components

An integrated circuit and capacitive technology, applied in the direction of circuits, electrical components, electric solid devices, etc., to achieve low voltage requirements, material saving, and low operating voltage

Active Publication Date: 2018-05-11
INVENSAS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In other instances, a certain capacitance value is required in the integrated circuit design, and if the capacitor is to be incorporated into the chip-level package design, the fabrication process may be smooth

Method used

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  • Capacitive coupling of integrated circuit die components
  • Capacitive coupling of integrated circuit die components
  • Capacitive coupling of integrated circuit die components

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0015] exemplary system

[0016] figure 1 An exemplary wafer level packaging structure 100 including a first integrated circuit die 102 and a second integrated circuit die 104 is shown. Each integrated circuit die 102, 104 has a semiconductor 106, 108 (eg, silicon) and an underfill layer 110, 112 made of an insulator or dielectric (eg, silicon dioxide) to secure conductive regions 114, 116 and 118, 120. Each integrated circuit die 102 , 104 has a respective surface 122 , 124 that includes at least one of the conductive regions 114 , 116 or 118 , 120 .

[0017] The ultra-thin dielectric layer 126 has a thickness less than or equal to about 50 nanometers, and the ultra-thin dielectric layer 126 is formed on at least one of the surfaces 122 or 124 of at least one of the integrated circuit dies 102, 104 . The ultra-thin dielectric layer can be a coating, film, residue, film, deposit...etc. The coupled stack 100 forms a capacitive interface 128 comprising the ultra-thin dielec...

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PUM

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Abstract

Capacitive coupling of integrated circuit die components and other conductive areas is provided. Each component to be coupled has a surface that includes at least one conductive area, such as a metalpad or plate. An ultrathin layer of dielectric is formed on at least one surface to be coupled. When the two components, e.g., one from each die, are permanently contacted together, the ultrathin layer of dielectric remains between the two surfaces, forming a capacitor or capacitive interface between the conductive areas of each respective component. The ultrathin layer of dielectric may be composed of multiple layers of various dielectrics, but in one implementation, the overall thickness is less than approximately 50 nanometers. The capacitance per unit area of the capacitive interface formed depends on the particular dielectric constants k of the dielectric materials employed in the ultrathin layer and their respective thicknesses. Electrical and grounding connections can be made at theedge of the coupled stack.

Description

technical field [0001] This patent application claims the benefit of priority to U.S. Provisional Patent Application No. 62 / 234,022 filed September 28, 2015 by Haba et al., which is incorporated by reference in its entirety. into this article. Background technique [0002] Wafer-level packaging and reduction in size of microelectronic components may sometimes be limited by the need to incorporate components that are difficult to miniaturize. For example, a package sometimes depends on a discrete capacitor of considerable size. The encapsulation can be made smaller if it does not need to depend on large components. In other instances, a certain capacitance value is required in the integrated circuit design, and the fabrication process may be streamlined if the capacitor is to be incorporated into the WLP design. Contents of the invention [0003] Overview [0004] The present disclosure describes capacitive coupling of microelectronic components (eg, integrated circuit ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/522H01L23/50
CPCH01L23/642H01L2225/06531H01L23/48H01L24/29H01L2224/29186H01L2224/32145H01L2224/80896H01L2224/03614H01L24/03H01L24/80H01L2224/034H01L2224/03602H01L2224/08145H01L2224/274H01L2224/2908H01L2224/2919H01L2224/83191H01L2224/83193H01L2224/27602H01L2224/08121H01L2224/80901H01L24/72H01L24/27H01L24/32H01L24/83H01L25/0657H01L25/50H01L2224/27614H01L2224/83896H01L2224/03009H01L21/2007H01L2924/00014H01L23/50H01L23/5222H01L2924/30105H01L2924/19041H01L21/02164H01L21/02181H01L21/0228H01L21/31111H01L2224/27452H01L2224/29187H01L2224/32135H01L2924/01072H01L2924/0534H01L2924/05442
Inventor 亚卡尔古德·R·西塔朗贝尔格森·哈巴
Owner INVENSAS CORP
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