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A lockstep processor and management method

A management method and processor technology, applied in the field of high-reliability multi-processor computer architecture, can solve problems such as failure to effectively achieve fault recovery and rapid system degradation, achieve reliable real-time fault recovery, high fault detection rate, and reduce development costs. Effect

Active Publication Date: 2021-08-03
XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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AI Technical Summary

Problems solved by technology

Using this method achieves a very high fault detection rate, but cannot effectively achieve fault recovery, and the system degrades quickly

Method used

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  • A lockstep processor and management method
  • A lockstep processor and management method
  • A lockstep processor and management method

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Experimental program
Comparison scheme
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Embodiment Construction

[0014] The present invention will be described in further detail below.

[0015] The Lockstep processing machine of the present invention adopts single module design, mainly is made up of 3 modules parallel working processor CPU, 3 modules parallel working RAM, 2 modules active and standby ROM, 2 modules active and standby clock unit and system management logic unit ( see figure 1 ), and adopt redundant power supply design (see figure 2 ), system state transition see image 3 . It is characterized by:

[0016] 1. Functional components in the system are divided into parallel working component areas according to their impact on system reliability and security ( figure 1 shaded area) and active and standby working parts area. Fault-tolerant management is performed separately through the system management logic unit.

[0017] 2. Parallel working components mainly include 3-mode parallel working processor CPU and 3-mode parallel working RAM.

[0018] (1) In the normal worki...

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Abstract

The invention belongs to computer system reliability design technology, and relates to a high-reliability multi-processor computer architecture for real-time monitoring of faults and real-time fault recovery. Including that the processor system adopts a single module design, including a processor unit, a memory unit, a power supply management unit, a clock unit, and a system management unit; the processor unit includes 3 similar or non-similar processor CPUs working in parallel; the The memory unit is composed of 3 random access memory RAMs working in parallel, 2 active and standby read-only memories ROM, and 1 non-volatile memory NVM; the power supply management unit realizes the monitoring and management of the system's dual redundant power supply and Power conversion and management; the clock unit realizes the monitoring and management of dual redundant clock circuits; the system management unit is responsible for monitoring the working conditions of system resources, locating, isolating and recovering resource failures.

Description

technical field [0001] The invention belongs to computer system reliability design technology, and relates to a high-reliability multi-processor computer framework for real-time monitoring and real-time recovery of faults. Background technique [0002] The fault-tolerant ability of computer is of great significance for its application in safety-critical fields. Hardware redundancy technology is a technology that effectively improves the fault tolerance of computer systems. By introducing multiple hardware components to complete the same task, when a redundant component in the system fails, the system will reorganize the remaining normal components to continue to complete the task. Lockstep technology is a method to effectively organize redundant processor components to realize high-integrity computing in fault-tolerant multiprocessor systems. In a traditional Lockstep processor system, the two processors act as the main processor and the monitoring processor to execute the ...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/16G06F11/20
CPCG06F11/1604G06F11/1641G06F11/165G06F11/2015G06F11/2028G06F11/2033G06F11/2094
Inventor 徐奡刘帅周啸郑久寿李鹏夏德天
Owner XIAN AVIATION COMPUTING TECH RES INST OF AVIATION IND CORP OF CHINA
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