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Grid electrode driving circuit and driving method thereof and display device

A gate drive circuit and gate technology, applied in static indicators, instruments, etc., can solve problems such as poor display and drift of TFT electrical characteristics, and achieve the effects of reducing poor display, inhibiting threshold voltage drift, and reducing time

Active Publication Date: 2018-06-29
BOE TECH GRP CO LTD +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The present invention provides a gate drive circuit, its drive method, and a display device, so as to solve the problems that the electrical characteristics of the TFT drift caused by the pull-up signal and the reset signal in the existing gate drive circuit, resulting in various poor displays.

Method used

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  • Grid electrode driving circuit and driving method thereof and display device
  • Grid electrode driving circuit and driving method thereof and display device
  • Grid electrode driving circuit and driving method thereof and display device

Examples

Experimental program
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Embodiment 1

[0059] refer to image 3 , shows a schematic diagram of a gate driving circuit provided by Embodiment 1 of the present invention.

[0060] The gate drive circuit includes: an input module 1 , a first pull-up module 2 , a second pull-up module 3 , a first pull-down module 4 , a second pull-down module 5 , a reset module 6 and a storage module 7 .

[0061] The input module 1 is respectively connected to the input signal terminal INPUT and the pull-up node PU.

[0062] The first pull-up module 2 is respectively connected to the first control signal terminal CtrlA, the pull-up node PU, the first clock signal terminal CLK and the output terminal OUTPUT, and is used to output a high level to the output terminal OUTPUT under the control of the first control signal .

[0063] The second pull-up module 3 is respectively connected to the second control signal terminal CtrlB, the pull-up node PU, the first clock signal terminal CLK and the output terminal OUTPUT, for outputting a high ...

Embodiment 2

[0099] refer to Figure 6 , shows a schematic diagram of a gate driving circuit provided by Embodiment 2 of the present invention.

[0100] exist image 3 On the basis of , the gate drive circuit also includes a pull-down control module 8 and a third pull-down module 9 .

[0101] The pull-down control module 8 is respectively connected with the second clock signal terminal CLKB, the pull-down node PD, the pull-up node PU and the first level signal terminal VSS, and is used to pull down the level of the pull-down node PD under the control of the second clock signal; The second clock signal and the first clock signal input from the first clock signal terminal CLK are mutually same-frequency and anti-phase signals.

[0102] The third pull-down module 9 is respectively connected to the pull-down node PD, the first level signal terminal VSS, the pull-up node PU and the output terminal OUTPUT, and is used to pull down the levels of the pull-up node PU and the output terminal OUTPU...

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Abstract

The invention provides a grid electrode driving circuit and a driving method thereof and a display device and relates to the technical field of display. A first control signal input through a first control signal end is adopted for controlling a first upward pulling module and a first downward pulling module to work, a second control signal input through a second control signal end is adopted forcontrolling a second upward pulling module and a second downward pulling module to work, and by controlling the electrical levels of the first control signal and second control signal, the first upward pulling module and the second upward pulling module are driven to alternatively work, and meanwhile the first downward pulling module and the second downward pulling module are driven to alternatively work, so that time for receiving signals of upward pulling nodes of each upward pulling module is shortened, time for receiving reset signals of each downward pulling module is also shortened, andthreshold voltage drift of a TFT is effectively suppressed. Therefore, stable electrical properties of the TFT is achieved, influences on the output of an output end are reduced, and the occurrence rate of various display failures caused by the properties of the TFT is decreased.

Description

technical field [0001] The present invention relates to the field of display technology, in particular to a gate driving circuit, a driving method thereof, and a display device. Background technique [0002] With the popularity of liquid crystal display devices, they are widely used in electronic products such as televisions, mobile phones and computers. In an existing liquid crystal display device, the gate drive circuit generally controls the on and off of a TFT (Thin Film Transistor, thin film transistor) in a pixel unit, so as to complete the row scanning of the liquid crystal display device. [0003] Such as figure 1 and figure 2 as shown, figure 1 is a circuit diagram of a gate drive circuit in the prior art, figure 2 It is a working timing diagram of a gate drive circuit in the prior art, the circuit is used to control the turn-on and turn-off of the thin film transistor in the pixel unit, but the pull-up TFT (such as figure 1 M3 in ) and reset TFT (such as fi...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G09G3/36
CPCG09G3/3681G09G3/3677G09G2310/0286G09G3/2092G09G2300/0426G09G2310/061G09G2310/08
Inventor 孙静张淼刘金良李环宇
Owner BOE TECH GRP CO LTD
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