Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

2results about How to "Avoid Threshold Voltage Drift" patented technology

A packaging method suitable for a hybrid device package structure of a micro LED

ActiveCN122121371AAvoid Threshold Voltage DriftEliminate physical pathsParasitic capacitanceElectrode Contact
The application relates to the fields of microelectronic packaging and novel display technology, and discloses a packaging method suitable for a hybrid device packaging structure of a MicroLED, which comprises the following steps: preparing a wide-bandgap semiconductor driving chip, a logic control chip and a light-emitting pixel chip; transferring and fixing the wide-bandgap semiconductor driving chip, the logic control chip and the light-emitting pixel chip on the surface of a carrier plate in a coplanar mode; depositing a dielectric layer on the surface of the carrier plate to expose electrode contacts; manufacturing metal wires to build an internal electrical interconnection structure and lead out a peripheral interface; coating a packaging material on the surface of the carrier plate to insulate and coat the internal electrical interconnection structure; curing and cutting to separate an independent pixel packaging body; and assembling the pixel packaging body to a display panel substrate and connecting the peripheral interface to a global power supply network. The application suppresses the hot carrier effect under high-temperature working conditions, solves the problem of thermal failure, reduces the parasitic capacitance of high-frequency driving interconnection, removes potential failure products before macroscopic mounting, and improves the assembly yield of a display panel array.
Owner:SUZHOU XINJU SEMICON LTD

Semiconductor device and method of manufacturing the same

ActiveCN122227657BIncrease effective width/lengthIncrease drive current
This application provides a semiconductor device and a method for fabricating the same. The method includes: providing a substrate comprising a first region and a second region; forming a hard mask layer on the substrate to expose a field oxide layer region in the first region and an isolation region in the second region containing a portion of the isolation structure adjacent to the active region; performing an oxidation process to form a field oxide layer in the first region and a bird's beak oxide layer on the active region in the second region, the bird's beak oxide layer having a thin center and thick edges; and removing the hard mask layer and the bird's beak oxide layer to expose an active region in the second region with an upwardly curved upper surface. This application forms an upwardly curved active region without increasing process steps, and increases the effective width / length of the device without increasing the active region layout size, thereby simultaneously suppressing threshold voltage drift and increasing the device drive current, achieving high performance, low power consumption, and improved reliability.
Owner:RONGXIN SEMICON (HUAIAN) CO LTD