Semiconductor structure and preparation method thereof

A semiconductor and gate structure technology, which is applied in semiconductor/solid-state device manufacturing, semiconductor devices, semiconductor/solid-state device components, etc., can solve problems such as expensive pattern forming equipment, achieve short-channel effect suppression, and avoid threshold voltage drift , Improve the effect of integration and performance
CN114709168APending Publication Date: 2022-07-05CHANGXIN MEMORY TECH INC
0 Cites 1 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
CHANGXIN MEMORY TECH INC
Publication Date
2022-07-05

Smart Images

  • Figure 1
    Figure 1
  • Figure 2
    Figure 2
  • Figure 3
    Figure 3
Patent Text Reader

Abstract

The invention provides a semiconductor structure and a preparation method thereof. The preparation method of the semiconductor structure provided by the invention comprises the following steps: providing a substrate; a base pattern is formed on the substrate, the base pattern comprises a plurality of bit lines arranged in parallel, and isolation structures are arranged among the bit lines; forming a plurality of semiconductor columns arranged along the direction of the bit line on the surface of the bit line, wherein the bit line is electrically connected with the semiconductor columns; a surrounding gate structure is formed on the surface of the semiconductor column, the surrounding gate structure comprises a first insulating layer, a gate structure layer and a second insulating layer which are sequentially arranged on the side face of the semiconductor column, and the gate structure layer is electrically connected with the semiconductor column; and forming a first wire, a magnetic tunnel junction and a second wire which are stacked in sequence on the surface of the surrounding gate structure, wherein the first wire is electrically connected with the semiconductor column. The performance of the semiconductor structure is greatly improved, and the requirement for miniaturization is met.
Need to check novelty before this filing date? Find Prior Art

Description

technical field

[0001] The present disclosure relates to the field of semiconductors, and in particular, to a semiconductor structure and a preparation method thereof. Background technique

[0002] The need for inexpensive semiconductor structures with high performance drives integration density, which in turn places higher demands on semiconductor fabrication processes.

[0003] The integration density of a two-dimensional (2D) or planar semiconductor structure is determined in part by the area occupied by the individual elements (eg, memory cells) that make up the integrated circuit. The area occupied by the individual elements is largely determined by the dimensional parameters (eg, width, length, pitch, narrowness, adjacent spacing, etc.) used to define the patterning techniques for the individual elements and their interconnections. Providing increasingly "fine" patterns requires the development and use of very expensive patterning equipment.

[0004] As the semicondu...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More