64 results about "Electron capture" patented technology

The invention discloses a gate dielectric film growth process, an HEMT (High Electron Mobility Transistor) device and a preparation method, and the gate dielectric film growth process comprises the steps: executing a primary process cycle of atomic layer deposition, and forming an amorphous gate dielectric film on the surface of a substrate; after the primary process circulation is completed, in-situ gas plasma treatment is executed, a single crystal gate dielectric film converted from the amorphous gate dielectric film after treatment is obtained, and when the single crystal gate dielectric film is formed between a metal gate and a barrier layer of the HEMT device, the interface state of the metal gate at a gate groove can be improved, the quality of a contact interface below gate metal is improved, and the performance of the HEMT device is improved. And the defect density and the electron trapping effect are reduced, so that the problems of serious influence on safe operation of the device and even grid degradation caused by grid leakage and threshold voltage drift after stress of the device can be effectively avoided, and the performance of the device is improved.

To provide a solar battery with a vertical conduction connection structure of which a power generation performance is improved.SOLUTION: A solar battery comprises a plurality of units. Each unit comprises: a power generation element that includes an electrode, a light absorption layer that is formed onto the electrode, and contains an electron capture agent and a color element, and an opposite electrode arranged so as to be opposite to the electrode. Also, the solar battery comprises: a vertical conductive sealing material that is formed to between a first unit and a second unit that are adjacent from the plurality of units, and conducts the electrode of the first unit and the opposite electrode of the second unit; and an external sealing material that is formed so as to surround an outer periphery of the plurality of units. The electrode is entered into the vertical conductive sealing material and the external sealing material. The opposite electrode is entered into the vertical conductive sealing material, and is not entered into the external sealing material.SELECTED DRAWING: Figure 3

The invention belongs to the related technical field of neuromorphic visual sensors, and discloses an eagle-eye bionic dynamic visual sensor and a preparation method and application thereof, the visual sensor comprises a dielectric layer substrate, a functional layer and a cross array structure composed of a bottom electrode, an insulating layer and a top electrode which are arranged from bottom to top; wherein the functional layer is of a core-shell heterojunction structure formed by noble metal nanoparticles and a two-dimensional metal chalcogenide. According to the obtained core-shell heterojunction structure, an electron capture and slow release phenomenon caused by local surface plasmon resonance effect excitation and interface defects of precious metal nanoparticles is constructed on a device, and the sensor can realize an eagle-eye-imitating dynamic visual function; and the visual sensor can perform eagle-eye-imitating dynamic visual processing on image information due to a unique electronic synapse function while realizing an image optical sensing function, so that integration of sensing and preprocessing functions is realized.

The invention relates to a photoelectric device for generating electric energy through conversion of ultraviolet light and near-infrared light, and discloses an ultraviolet photoelectric synapse / near-infrared photoelectric detection dual-mode photoelectric device. The dual-mode photoelectric device integrates dual functions of ultraviolet photoelectric synapse and near-infrared photoelectric detection: the ultraviolet photoelectric synapse function is realized based on a heterojunction formed by a single-layer graphene film and a wide bandgap perovskite Cs3Cu2I5 film, and B4PyMPM is doped in the Cs3Cu2I5 film to serve as an electron capture site, so that the electron capture capability is enhanced, and the photoelectric detection efficiency is improved. The performance of the ultraviolet photoelectric synapse device can be improved; a near-infrared photoelectric detection function is realized based on a heterojunction formed by a single-layer graphene thin film and n-type Ge, and the thickness of the Cs3Cu2I5 thin film is optimized, so that the Cs3Cu2I5 thin film becomes an antireflection layer of a 1550 nm near-infrared band, and the responsivity, the specific detection rate and other properties of a near-infrared photoelectric detection device are improved. The device disclosed by the invention is simple in structure and process, expensive instruments and equipment are avoided, and the preparation cost of the device is reduced.

The invention relates to the technical field of photocatalysts, in particular to a bismuth-defect bismuth oxybromide-sulfur-defect bismuth sulfide bromide heterojunction and a preparation method and application thereof in photocatalytic CO2 reduction, Bi (NO3) 3.5 H2O, thiourea, cetyltrimethylammonium bromide (CTAB) and the like are used as raw materials, and the VBi-Bi4O5Br2 / VS-Bi19Br3S27 heterojunction is prepared through a two-step hydrothermal method. According to the VBi-Bi4O5Br2 / VS-Bi19Br3S27 heterojunction, bismuth vacancies and sulfur vacancies are introduced, the visible light absorption range of the material is expanded through a proper amount of double vacancies, more electron capture centers are provided, and the separation efficiency of photo-induced electrons and the vacancies is improved, so that the VBi-Bi4O5Br2 / VS-Bi19Br3S27 heterojunction has excellent performance of photocatalytic reduction of CO2, and the preparation method of the VBi-Bi4O5Br2 / VS-Bi19Br3S27 heterojunction is suitable for large-scale production and application of the VBi-Bi4O5Br2 / VS-Bi19Br3S27 heterojunction. CO2 can be reduced into a single product CO, and the photoreduction efficiency of the carbon dioxide can be improved.

The invention belongs to the field of photoelectric devices, and discloses a method for improving the performance of a wide bandgap perovskite heterojunction ultraviolet photoelectric synapse device, the ultraviolet photoelectric synapse device realizes an ultraviolet photoelectric nerve synapse function through a heterojunction formed by a PEDOT: PSS hole transport layer and a wide bandgap perovskite PEA2PbCl4 film, B3PyMPM is doped in the PEA2PbCl4 film as an electron capture site, and the performance of the wide bandgap perovskite heterojunction ultraviolet photoelectric synapse device is improved. The electron trapping capability is enhanced, and the performance of the ultraviolet photoelectric synapse device can be improved. The method is simple in process, expensive instruments and equipment are avoided, and the device preparation cost is reduced.

To provide a semiconductor device suitable for high reliability and high speed operation.SOLUTION: A semiconductor device includes a first conductor, a second conductor, a first insulator, a second insulator, a third insulator, a semiconductor, and an electron capture layer. The semiconductor has a channel formation region, the electron capture layer has a region mutually overlapped to the channel formation region through the second insulator, the first conductor has a region mutually overlapped to the channel formation region through the first insulator, the second conductor has a region mutually overlapped to the electron capture layer through the third insulator; and the second conductor does not have a region overlapped to the channel formation region.SELECTED DRAWING: Figure 5

The invention discloses an enhanced GaN HEMT (High Electron Mobility Transistor) device based on a composite gate and gate terminal expansion and a preparation method thereof, the p-InGaN and p-GaN / p + GaN layer heterojunction polarization effect in the composite gate structure of the enhanced GaN HEMT device can generate two-dimensional hole gas on an interface, and more holes are injected into a channel to be compounded with electrons when high leakage voltage is turned off; the electron concentration of the lower channel layer near the gate is reduced, so that electron capture of the buffer layer on the channel layer is inhibited, the dynamic performance of the device is improved, the reliability of the device is enhanced, the gate terminal expansion structure is utilized to expand the composite gate structure, the off-state electric field distribution of the device is optimized, and the reliability of the device is improved. The electric field peak value of the edge of the gate field plate can be redistributed and weakened, the current collapse effect is effectively restrained, and the preparation method of the device is simple in process and low in cost. According to the scheme, the gate stability and the dynamic performance of the device can be improved, and a reliable device basis is provided for a GaN power system with higher frequency, higher efficiency and higher power density.

Provided are a method for controlling an artificial object, a device for controlling an artificial object, and an artificial object provided with the device for controlling an artificial object, whereby an artificial object is controlled with a high degree of freedom without requiring a special propellant. Provided is a control method for controlling an artificial object (100) in the vicinity of a planet or satellite including the earth located in a cosmic space, the control method accelerating the injection of electrons, increasing the potential of the artificial object (100) compared to a state in which no electron is emitted, promoting the capture of electrons present in the vicinity of the artificial object (100) compared to the state in which no electron is emitted, and increasing the potential of the artificial object (100) in the vicinity of a planet or satellite including the earth located in the cosmic space. The electrons captured by the accelerated injection change the momentum or / and angular momentum of the artificial object (100) by a reaction generated in accordance with the momentum imparted to the electrons after the accelerated injection.

The application provides an AlN / HfO2 interface structure design method and device, comprising: establishing a first interface model of AlN / HfO2; optimizing the interface structure of the first interface model to obtain a preset number of second interface models; wherein the oxygen content in the interface structure corresponding to each second interface model is different; optimizing the interface structure corresponding to each second interface model to obtain an energy value corresponding to each second interface model; calculating the electron capture energy and the hole capture energy corresponding to each second interface model; and determining the interface structure corresponding to a third interface model with high electron capture energy according to the electron capture energy and the hole capture energy. The application determines the interface structure corresponding to the third interface model with high electron capture energy by calculating the electron capture energy and the hole capture energy of the second interface model with different oxygen contents, solves the problem that the interface structure with high electron capture capacity cannot be quickly screened, and causes experimental data to be difficult to analyze and a large amount of time to be wasted.

The present invention relates to a photoelectric device that generates electrical energy by converting ultraviolet and near-infrared light. A dual-mode photoelectric device, ultraviolet photosynapse / near-infrared photodetection, is disclosed. This dual-mode device integrates both ultraviolet photosynapse and near-infrared photodetection functions: The ultraviolet photosynapse function is achieved through a heterojunction consisting of a single-layer graphene film and a wide-bandgap perovskite Cs3Cu2I5 film. The Cs3Cu2I5 film is doped with B4PyMPM as an electron-trapping site to enhance electron-trapping capability, thereby improving the performance of the ultraviolet photosynapse device. The near-infrared photodetection function is achieved through a heterojunction consisting of a single-layer graphene film and n-type Ge. The Cs3Cu2I5 film is optimized in thickness to serve as an antireflection layer in the 1550 nm near-infrared band, thereby improving the responsivity, specific detectivity, and other performance characteristics of the near-infrared photodetection device. The device structure and process of the present invention are simple, avoiding the need for expensive instrumentation and equipment, and reducing device manufacturing costs.

The invention relates to a light-emitting device and a display device. The light-emitting device comprises a light-emitting layer, a first functional layer and an electron capture layer located between the light-emitting layer and the first functional layer. The electron capture layer is used for capturing electrons, generating blue light excitons and transferring exciton energy to the light-emitting layer in a fluorescence resonance energy transfer mode; the first functional layer is used for forming a stepped barrier with the electron capture layer, wherein the stepped barrier is beneficial to hole injection and transmission. According to the light-emitting device adopting the technical scheme, the electron capture layer can capture electrons and generate blue light excitons, and exciton energy is transferred to the light-emitting layer in a fluorescence resonance energy transfer mode; the first functional layer and the electron capture layer can form a step barrier facilitating hole injection and transmission, and hole injection and transmission are facilitated. The efficiency of the light-emitting device can be improved, and wide application is facilitated.

The invention provides a semiconductor structure and a forming method thereof, and the method comprises the steps: providing a substrate which is provided with a pair of first gate structures; forming an electron trapping layer on the substrate, wherein the electron trapping layer covers the side wall and the top of the first gate structure; at least removing part of the electron trapping layer between the paired first gate structures to expose the surface of the substrate; forming a first source-drain doped region in the exposed substrate between the paired first gate structures; forming a second gate structure above the first source-drain doped region, wherein the second gate structure at least covers the side wall and the surface of the electron trapping layer; and forming a second source-drain doped region in the substrate at one side, far away from the second gate structure, of the first gate structure. By adopting the technical scheme, the storage density can be effectively improved.

The invention discloses a BE-SONOS (Bipolar-Silicon Oxide Nitride Oxide Semiconductor) embedded memory structure. The BE-SONOS embedded memory structure comprises a selection gate, a control gate and a floating gate, the control gate is located on the floating gate, and the floating gate and the control gate are isolated by an insulating dielectric layer; the control gates and the floating gates are divided into a plurality of groups, and the selection gate is of a groove type and is positioned in the substrate between the adjacent control gate and floating gate; channel regions are formed in the substrate on the two sides of the trench-type selection gate; the floating gate is of a composite BE-SONOS multi-layer structure and sequentially comprises a first oxide layer, a first nitride layer, a second oxide layer, a second nitride layer and a third oxide layer from bottom to top. According to the invention, the characteristic that an Si dangling bond in the nitride can capture electrons and holes is utilized, the nitride is used as an electron capture layer, and a floating gate of an existing structure is replaced by a BE-SONOS structure, so that the carrier injection efficiency is relatively improved, fewer masks are used in the manufacturing process, the process time is shortened, and the manufacturing efficiency is improved.

The embodiment of the invention discloses a storage method of a field effect transistor, a readable storage medium and a storage system, and the storage method comprises the steps: firstly applying a positive or negative pulse to a grid electrode of a ferroelectric polarization auxiliary charge trapping field effect transistor, so as to enable the field effect transistor to be in an electron trapping state or a hole trapping state; and writing information in an electron capture state or a hole capture state. On the basis of the application, the situation that a large number of electrons or holes are injected and captured in the pulse process of the grid electrode of the field effect transistor, so that the read threshold voltage drifts is considered, the threshold voltage difference value generated by capturing of the electrons or the holes is used as a storage window, information storage is realized, and the reading efficiency is improved. The memory function is realized by utilizing the phenomenon that electrons or holes induced by ferroelectricity are captured and the part of electrons or holes can be retained in a gate medium for a certain time, and a single-transistor DRAM (Dynamic Random Access Memory) memory device with the size of 4F2 is realized.

The application relates to a field effect transistor and a power electronic system. The field effect transistor comprises a substrate, a channel layer formed on the substrate, a barrier layer formed on the channel layer, a two-dimensional electron gas channel formed between the barrier layer and the channel layer, a source electrode, a gate electrode and a drain electrode formed on the barrier layer and arranged in sequence at intervals along a first direction, a P-type compensation island at least partially higher than the barrier layer and located between the gate electrode and the drain electrode, the P-type compensation island being spaced apart from the drain electrode and the gate electrode, a shielding plate located above the P-type compensation island, a passivation layer arranged between the shielding plate and the P-type compensation island, and the shielding plate being arranged at intervals from the gate electrode and the drain electrode. Through the coupling effect of the P-type compensation island and the shielding plate, the potential distribution between the gate electrode and the drain electrode is more uniform, thereby reducing the peak value of the high field on the drain side, improving the breakdown margin, and effectively reducing the virtual gate effect caused by electron capture after high-voltage turn-off, thereby greatly reducing the increase of the dynamic on-resistance.

The application discloses a wound dressing and a preparation method and application thereof; the wound dressing comprises polymer flexible fibers and cobalt-iron layered double hydroxide nanosheets dispersed in the polymer flexible fibers; the cobalt-iron layered double hydroxide nanosheets contain a cobalt vacancy structure in a crystal lattice. The wound dressing has a strong "electron capture effect" due to the cobalt vacancy. The wound dressing can physically capture electrons on a respiratory transmission chain of a pathogenic bacterial cell membrane, interferes with transmembrane proton transfer and ATP synthesis, directly kills the bacteria through "metabolic starvation", and further has a broad-spectrum physical bactericidal function independent of antibiotics. The wound dressing has excellent superoxide dismutase-like and catalase-like activities, can long-acting capture and remove active oxygen such as superoxide anions and hydrogen peroxide in an inflammatory microenvironment of a wound, promotes macrophages to polarize to a M2 phenotype for promoting repair, and has anti-inflammatory and pro-angiogenic functions.

The application relates to the technical field of piezoelectric photocatalytic materials, in particular to a Na,Sm-CaBi2Nb2O9 / O V -BiOBr piezoelectric photocatalytic material, a preparation method and application thereof. The method comprises the following steps: firstly, preparing Na,Sm-CaBi2Nb2O9 by a molten salt method and dispersing the Na,Sm-CaBi2Nb2O9 in a mannitol solution; then, adding PVP and Bi(NO3)3.5H2O in sequence; and finally, adding a saturated NaBr solution drop by drop and performing hydrothermal treatment; through accurate control of a hydrothermal temperature and a reaction time, a Na,Sm-CaBi2Nb2O9 / O 2+ -BiOBr S-type heterojunction piezoelectric photocatalyst which is rich in oxygen vacancies and has a shared (Bi2O2) V interface is finally obtained. The catalyst realizes the transfer of carrier recombination centers through the electron capture effect of oxygen vacancies, optimizes the local dipole state distribution and the interface non-centrosymmetry, effectively controls the carrier recombination path, significantly enhances the piezoelectric polarization strength, successfully inhibits the self-reduction behavior of the interface Bi 3+ , and greatly improves the piezoelectric photocatalytic activity. The application effectively solves the problems of high crystal face mismatch degree, insufficient stability and low piezoelectric photocatalytic activity of traditional bismuth-based heterojunction materials by constructing structure-matched heterojunction materials, and opens up a new way for the application of layered bismuth-based perovskite materials in the field of piezoelectric photocatalytic water splitting.

A 3D NAND flash memory device and fabricating method thereof, comprises: First, a semiconductor substrate layer is provided, wherein cell isolation structures, channel structures and source lead-out spaces are formed on the semiconductor substrate layer, with the cell isolation structures including cell isolation layers and memory cell-occupied spaces. First dielectric layers and second dielectric layers are sequentially deposited, the first dielectric layer covering at least an exposed surface of the cell isolation structure. The second dielectric layers are then etched to remove all of the second dielectric layers on the side surface and at least part of the second dielectric layers on the second surface, and all of the second dielectric layers on the first surface is retained, with the remaining second dielectric layer forming at least one electron capture layer for memory cell structures. The memory cell structures and electrode structures for the flash memory device are finally fabricated.

A 3D NAND flash memory device and fabricating method thereof, comprises: First, a semiconductor substrate layer is provided, wherein cell isolation structures, channel structures and source lead-out spaces are formed on the semiconductor substrate layer, with the cell isolation structures including cell isolation layers and memory cell-occupied spaces. First dielectric layers and second dielectric layers are sequentially deposited, the first dielectric layer covering at least an exposed surface of the cell isolation structure. The second dielectric layers are then etched to remove all of the second dielectric layers on the side surface and at least part of the second dielectric layers on the second surface, and all of the second dielectric layers on the first surface is retained, with the remaining second dielectric layer forming at least one electron capture layer for memory cell structures. The memory cell structures and electrode structures for the flash memory device are finally fabricated.

A method for determining a mass value for an ion species, wherein the ion species comprises an adeno-associated virus (AAV) capsid, the method comprising: using a mass spectrometer, e.g. a time-of-fli

The invention relates to a power semiconductor device and a preparation method thereof, and relates to the power semiconductor device, in order to further reduce on-resistance and improve device stability, a third semiconductor layer connected to a drain electrode is additionally arranged beside the drain electrode in the horizontal direction, and under the state of drain electrode bias voltage, the third semiconductor layer can reduce the on-resistance on the premise of ensuring normal conduction of the device. The third semiconductor layer injects holes into the buffer layer, so that electrons captured in crystal defects in the buffer layer are released, the on-resistance of the device is reduced, and the stability of the device is improved; the third semiconductor layer is separated from the barrier layer in the vertical direction, so that the two-dimensional electron gas below the third semiconductor layer cannot be exhausted, and the device can be normally conducted.

The invention provides a functionalized cornea stroma lens acellular scaffold as well as a preparation method and application thereof, and belongs to the technical field of biomedical materials. A functional cornea-derived natural extracellular matrix (ECM) scaffold is used as a core, a decellularized freeze-drying technology is combined to prepare a decellularized freeze-dried lens (LDL) convenient to store, and an oxidized heparin interface modification technology is used to enrich active factors through an electron capture principle so as to construct a functional ECM platform. And the safety and effectiveness are evaluated in vivo and in vitro. Research results show that the system has long-term storage capacity and low immunogenicity, can prolong the action duration of a nerve growth factor (NGF), effectively inhibits postoperative inflammation and fibrosis in a rabbit cornea stroma lens transplantation model, supports stroma cell colonization and nerve reinnervation, and remarkably promotes cornea tissue repair and regeneration. The novel functional ECM platform developed by the invention provides a new thought and reference for the ECM stent in the field of cornea regeneration treatment.

The invention discloses a method for analyzing chlorinated paraffin in an environment or food sample. Comprehensive two-dimensional gas chromatography-electron capture negative chemical ion source quadrupole mass spectrometry is used for analyzing short-chain and medium-chain chlorinated paraffin in an environment or a food sample. According to the technology, co-outflow components in a complex matrix can be effectively distinguished through orthogonal separation in a unit mass resolution mode, and characteristic ion response information of a target chlorinated paraffin homologue group (C10-C17) can be rapidly and accurately obtained. The detection limit of the method can reach a nanogram / gram (ng / g) level, and the method has high sensitivity, accuracy and precision; according to the method, the conventional C10-C17 chlorinated paraffin in the environment or food sample can be comprehensively covered and accurately quantified, and the actual demand on comprehensive analysis of short-chain and medium-chain chlorinated paraffin in the current environment and food monitoring is effectively met.

The application provides a semiconductor structure and a manufacturing method thereof. The semiconductor structure comprises, from bottom to top, a semiconductor substrate, a heterojunction structure, a cap layer, a first passivation layer, and a second passivation layer; a groove penetrating through the first passivation layer and the second passivation layer; and a P-type semiconductor layer at least on the inner wall of the groove. After the groove is formed by dry etching the second passivation layer, the first passivation layer can be used for etching endpoint detection to avoid over-etching. The first passivation layer exposed at the groove of the second passivation layer can be removed by wet etching. When the first passivation layer is removed by wet etching, the cap layer has very high stability, so that the cap layer is not damaged after the first passivation layer is removed by wet etching. The undamaged cap layer can effectively reduce the surface defects of the heterojunction structure, so as to reduce the probability of electron capture by defects, achieve weakening of the current collapse effect, and reduce the dynamic on-resistance.

The application discloses a double-gate-based GaN high electron mobility transistor structure and a preparation method thereof. The transistor structure comprises, from bottom to top, a substrate, a nucleation layer, a buffer layer, a channel layer, a barrier layer and a dielectric layer. The dielectric layer is provided with a source trench and a drain trench on two sides thereof, and a gate structure is arranged at a position between the source trench and the drain trench. The gate structure comprises a left gate structure close to the source trench and a right gate structure close to the drain trench, and the left and right gate structures are isolated by a dielectric. The structure makes the electric field of the right gate of the transistor adjustable by the left gate under the same gate voltage, and the distribution of the electric field is more uniform, thereby improving the gate leakage. Meanwhile, the change of the left gate is small, the hole escape and the electron capture are reduced, and the dynamic threshold and other problems of the device are improved. Under the premise of losing a certain on-resistance and gate capacitance, the saturated source-drain current of the device is improved, the gate leakage is reduced, and the gate reliability is improved.

The invention provides a Cu-based nanocrystalline alloy strip, which is characterized in that the Cu-based nanocrystalline alloy strip is a Cu-Zr-Al-Gd nanocrystalline alloy strip, and the Cu-Zr-Al-Gd nanocrystalline alloy strip is obtained by taking a corresponding amorphous alloy strip as a precursor and carrying out isothermal annealing treatment under a gas protection condition, the internal organization structure of the amorphous alloy strip is adjusted in the annealing process, and excessive precipitation of the active nano-composite from the surface of the material is inhibited; meanwhile, a structural relaxation process is realized through an annealing process, and various intermetallic compounds form a nanoscale microscopic primary battery due to potential difference, so that the catalytic degradation reaction process is enhanced; and the potential difference of various intermetallic compounds forms the effect of a nanoscale microscopic primary battery, and meanwhile, the grain boundary is reduced due to grain growth, so that electron capture can be greatly weakened, electron transport in the material is further promoted, and the catalytic activity is improved.

The application discloses a kind of Mn 0.5 Cd 0.5 Preparation method of S / CaTiO3 / Ni3C material and its application in photocatalytic nitrogen fixation, belong to the technical field of photocatalytic material. First, Mn 0.5 Cd 0.5 S / CaTiO3 S type heterostructure is prepared by in-situ deposition method, then the metalloid Ni3C nano-particle cocatalyst is combined with Mn 0.5 Cd 0.5 S / CaTiO3 by ultrasonic method to form Mn 0.5 Cd 0.5 S / CaTiO3 / Ni3C ternary composite photocatalyst. In the application, semiconductor Mn 0.5 Cd 0.5 S and semiconductor CaTiO3 first form S type heterostructure, not only accelerate the directional movement and separation of photo-generated electrons and holes, but also maintain the strong oxidation-reduction ability of photo-generated charge carriers. In addition, on the basis of S type heterostructure, load Ni3C cocatalyst, Ni3C nano-particle cocatalyst as electron capture center can not only provide more active sites, but also further improve the separation efficiency of charge.

The invention discloses a tin-lead perovskite photoelectric detector based on introduction of guanidine ions and strontium ions and a preparation method of the tin-lead perovskite photoelectric detector, and belongs to the technical field of perovskite photoelectric devices. The photoelectric detector is composed of an ITO conductive glass anode, a PTAA anode buffer layer, a tin-lead perovskite thin film with guanidine ions and strontium ions introduced, a C60 / BCP cathode buffer layer and a Cu cathode in sequence from bottom to top. When GA < + > ions are doped in A-site cations in perovskite, the carrier lifetime of the perovskite material can be prolonged, the open-circuit voltage of a device can be improved, the diffusion length of the carrier can be increased, defects can be reduced, and the stability of the device can be improved; sr < 2 + > ions are doped in the perovskite B site, so that the conductivity can be increased, the stability can be improved, the electrode performance can be optimized, the effects of passivating defects, reducing electron capture of traps and improving the photoelectric conversion efficiency can be finally achieved, the optimization effect is mainly reflected on light dark current and external quantum efficiency, and a high-performance photoelectric detector can be obtained.

To provide a dye-sensitized solar cell with high durability.SOLUTION: A dye-sensitized solar cell includes a plurality of units of dye-sensitized solar cells including an electrode, an electron transport layer, a light absorption layer, a counter electrode, a catalyst layer, an electrolyte solution, and a sealing material. The electrode is formed on a first substrate. The electron transport layer is formed on the electrode. The light absorption layer is formed on the electron transport layer and includes an electron capture agent and a dye. The counter electrode is formed on a second substrate disposed facing the first substrate. The catalyst layer is formed on the counter electrode. The electrolyte solution fills a space between the light absorption layer and the catalyst layer. The sealing material is held between the first substrate and the second substrate, and seals the electrode, the electron transport layer, the light absorption layer, the counter electrode, the catalyst layer, and the electrolyte solution. A region surrounded by an inner wall of the sealing material forms one power generation element. The size of each power generation element in a direction of current flowing in the unit is 6 mm or more and 10 mm or less.SELECTED DRAWING: Figure 1