SOI single-port SRAM (Static Random Access Memory) unit and a preparation method thereof

Abstract

The invention provides an SOI single-port SRAM unit and a preparation method thereof. The unit comprises a first phase inverter composed of a first PMOS transistor and a first NMOS transistor; a second phase inverter composed of a second PMOS transistor and a second NMOS transistor; an obtaining transistor composed of a third NMOS transistor and a fourth NMOS transistor. In the SRAM unit, the four transistors forming the first phase inverter and the second phase inverter are L-type gates; heavy dopant contact regions are arranged in the regions at the outer sides of the bending angles of the L-type gates. According to the unit and the method of the invention, leakage power consumption and transistor threshold voltage drift resulted from the floating body effect and parasitic triode effect in the PD SOI instrument can be effectively inhibited under the condition of sacrificing a relatively small unit area; the anti-noise capability of the unit is improved; the preparation technique of the invention introduces no extra mask plate and is fully compatible with the exiting logic technique; the inner part of the unit is a center symmetrical structure which is beneficial for matching the size and the threshold voltage of the MOS tube and for matching an array and is convenient for a full-custom SRAM chip.

Description

technical field [0001] The invention belongs to the field of memory design and production, and relates to an SOI single-port SRAM unit and a production method thereof. Background technique [0002] Since the invention of SOI technology in the 1980s, it has small parasitic capacitance, low power consumption, fast speed and natural anti-Single-Event-Latchup (SEL) ability compared with ordinary bulk silicon technology, making SOI The technology is very suitable for working in System-on-Chips (SoC), low power consumption and radiation resistance; in addition, Static Random Access Memory (SRAM) is widely used in consumer electronics, automotive electronics, processor level Cache and L2 cache; therefore, applying SOI technology to SRAM design has certain advantages. [0003] According to the degree of depletion of the MOS tube body region, SOI can be further divided into fully depleted (Full-Depleted, FD) SOI and partially depleted (Partially-Depleted, FD) SOI. For partially dep...

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Problems solved by technology

[0007] In view of the above-mentioned shortcoming of the prior art, the object of the present invention is to provide a kind of SOI single-port SRAM unit and manufacturing method thereof, be used to solve SOI single-port SRAM unit occupying a large area, poor stability, power leakage in the prior art The problem of high power consumption and weak anti-noise ability

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