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Network processing and forwarding method of security controllable performance achievable linear speed

A network processing and forwarding method technology, which is applied in the field of network processing and forwarding with safe and controllable performance up to wire speed, and can solve the problem of low performance of domestic processors, low performance of small packets, low performance of network processing and forwarding of the whole machine and system, etc. problems, to achieve the effect of improving network processing and forwarding capabilities, and improving network processing and forwarding performance

Inactive Publication Date: 2018-06-29
NO 30 INST OF CHINA ELECTRONIC TECH GRP CORP
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AI Technical Summary

Problems solved by technology

[0005] The method of the present invention is based on the "domestic CPU+domestic FPGA" independent platform, without sacrificing system functions, a network processing and forwarding method with safe and controllable performance that can reach wire speed, and is mainly used in the field of domestic self-controllable network security to solve the problem of The performance of domestic processors is low, resulting in low performance of the whole machine and system network processing and forwarding, especially the bottleneck problem of low performance of small packets

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  • Network processing and forwarding method of security controllable performance achievable linear speed

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Embodiment Construction

[0011] A network processing and forwarding method with safe and controllable performance up to wire speed, comprising the following content:

[0012] The basic hardware platform architecture of the present invention is as figure 1 As shown, the basic hardware platform includes domestic independent processors, high-performance processing forwarding layer and network interface. Among them, the high-performance processing and forwarding layer is composed of domestic FPGA and external storage. The interconnection relationship between each other is shown in the schematic diagram, and there is a software and hardware interface between the domestic processor and the high-performance processing forwarding layer.

[0013] Based on the domestic independent platform line speed to realize the "state detection packet filtering" technology, its design ideas and design methods have the following steps:

[0014] The first step is to analyze the business processing flow of the "stateful dete...

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Abstract

The invention discloses a network processing and forwarding method of security controllable performance achievable linear speed. Basic hardware comprises a processor, a high-performance processing forwarding layer and a network interface; the high-performance processing forwarding layer is composed of FPGA and an external memory; the processor is communicated with the high-performance processing forwarding layer through a software-hardware interface communication protocol; the processor realizes session new creation, session state detection and performs real-time management on a fast-forward entry of the high-performance processing forwarding layer; the high-performance processing forwarding layer is responsible for uploading the received data packet to the processor when the fast-forwardentry is uncreated, and performing high-performance processing forwarding on a received data message by the FPGA after the fast-forward entry is created. By constructing the high-performance processing forwarding layer and applying the software-hardware combination and cooperative working method, the network processing and forwarding performance of the whole system is greatly improved, especiallythe performance of the small packet; and the system performance can achieve the linear speed.

Description

technical field [0001] The invention relates to a network processing and forwarding method whose safe and controllable performance can reach wire speed. Background technique [0002] At present, in the field of network security, processors are generally used to perform protocol processing, rule matching, format checking, encapsulation, decapsulation, and forwarding of packet data packets, such as general-purpose firewall devices. In this implementation and method, the processing performance of the system is closely related to the network processing performance of the processor. When the interface rate reaches 10Gbps, 40Gbps, and the number of system interfaces doubles, the number of cores of the supporting processors doubles, which puts forward very high requirements in terms of system software design, multi-core programming, overall power consumption, heat dissipation, etc. and challenge. [0003] Under the background of vigorously advocating domestic independence of info...

Claims

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Application Information

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IPC IPC(8): H04L12/741H04L29/06H04L29/08H04L45/74
CPCH04L45/54H04L67/14H04L69/16
Inventor 吴中军卢宇浩张磊郭志君高建李泽张志文林武罗书建
Owner NO 30 INST OF CHINA ELECTRONIC TECH GRP CORP
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