Manufacture method for gate of embedded flash

A manufacturing method and embedded technology, applied in the direction of semiconductor devices, electrical components, circuits, etc., can solve the problems of long process time and high cost, and achieve the effect of simplifying the process process, saving costs, and eliminating step difference.

Active Publication Date: 2018-07-06
WUHAN XINXIN SEMICON MFG CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0009] The above process forms the gate of the logic region and the select gate and erase gate of the storage region through two polysilicon depositions, silicon oxide protective layer deposition, photolithography, chemical mechanical polishing and etching. The entire process takes a long time and is expensive.

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  • Manufacture method for gate of embedded flash
  • Manufacture method for gate of embedded flash
  • Manufacture method for gate of embedded flash

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Embodiment Construction

[0030] In order to make the content of the present invention clearer and easier to understand, the content of the present invention will be further described below in conjunction with the accompanying drawings. Of course, the present invention is not limited to this specific embodiment, and general replacements known to those skilled in the art are also covered within the protection scope of the present invention.

[0031] Secondly, the present invention is described in detail by means of schematic diagrams. When describing the examples of the present invention in detail, for the convenience of illustration, the schematic diagrams are not partially enlarged according to the general scale, which should not be used as a limitation of the present invention.

[0032] As mentioned in the background technology, in the process of manufacturing embedded flash memory gates in the prior art, in order to eliminate the step difference between the logic area and the storage area, two times ...

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Abstract

The invention provides a manufacture method for the gate of an embedded flash. The method includes the following steps that: a substrate is provided, wherein the substrate comprises a logic region anda storage region, a gate oxide layer is formed on the substrate, and a floating gate, a gate dielectric layer, a control gate and a barrier layer are sequentially formed on a part of the gate oxide layer on the storage region; a polysilicon layer is formed, wherein the polysilicon layer covers the logic region and the storage region; a protective layer is formed, wherein the protective layer covers the polysilicon layer, and the protective layer on the logic region is higher than the barrier layer on the storage region; the protective layer is planarized, so that the polysilicon layer on thestorage region can be exposed, and a part of the protective layer is reserved; with the reserved protective layer adopted as a mask, the polysilicon layer on the storage region is etched until a portion of the polysilicon layer with a certain thickness is reserved; and the reserved protective layer is removed. With the manufacture method adopted, a process flow can be simplified, and costs can besaved.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process, in particular to a method for manufacturing an embedded flash gate. Background technique [0002] In the current semiconductor industry, integrated circuit products can be mainly divided into three types: analog circuits, digital circuits and digital / analog hybrid circuits, among which storage devices are an important type of digital circuits. In recent years, the development of embedded flash memory (embedded flash, Eflash) in storage devices is particularly rapid. The main feature of embedded flash memory is that it can keep stored information for a long time without power on, and has the advantages of high integration, fast access speed, easy erasing and rewriting, etc. field has been widely used. [0003] The flash storage area in the embedded flash memory device has a stacked gate structure, which includes a tunnel oxide layer, a polysilicon floating gate for storing charges, and a ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L27/11524H01L27/11529H01L27/11531
CPCH10B41/35H10B41/42H10B41/41
Inventor 张超然李赟周俊
Owner WUHAN XINXIN SEMICON MFG CO LTD
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