ldmos device with arrayed multilayer faraday shielding ring structure
A Faraday shielding and array-type technology, which is applied in semiconductor devices, semiconductor/solid-state device manufacturing, electrical components, etc., can solve the problems of not improving gate leakage current, reducing output current and power density, etc.
Active Publication Date: 2020-10-30
扬州江新电子有限公司
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Problems solved by technology
[0006] c) Cannot improve gate leakage current
[0007] d) The introduction of the shielding ring flattens the electric field and also depletes some of the carriers in the channel, reducing the output current and power density
Method used
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Embodiment 1
[0018] Such as Figure 1-3 As shown, the LDMOS device with an arrayed multilayer Faraday shielding ring structure includes: P+ substrate layer 101, P- epitaxial layer 102, P+ injection layer 103, P well region 104, drift region, gate electrode 108, Under-gate oxide layer 114, source electrode 109, drain electrode 113, back metal 111, and source deep trench interconnection metal 110; the P- epitaxial layer 102 is grown on the P+ substrate layer 101; the P+ injection layer 103 grown on one side of the P- epitaxial layer 102, passing through the P- epitaxial layer and sinking into the P+ substrate layer; the P well region is grown on the P- epitaxial layer, and one side is in contact with the P+ injection layer; the drift region includes The first heavily doped N+ drift region 105, the lightly doped N-drift region 106, and the second heavily doped N+ drift region 107, one end of the first heavily doped N+ drift region 105 extends into the P+ injection layer 103, and the other On...
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Abstract
The invention discloses an LDMOS device having an array multi-layer Faraday shield ring structure. The LDMOS device comprises: a P+ substrate layer, a P- epitaxial layer, a P+ injection layer, a P well region, a drift region, a under-gate oxide layer, a gate electrode, a source electrode, a drain electrode, back metal, source deep trench interconnect metal, and at least three Faraday ring shield layers. Each of the Faraday ring shield layers is an array structure, covers the entire gate electrode and extends toward the source and drain. Arrays between the Faraday ring shield layers are perfectly aligned. The LDMOS device can flatten and weaken the under-gate drain-side peak electric field. The Faraday shield ring covers the source side, can reduce the gate leakage current while improving the under-gate drain-side peak electric field so that the device reliability is improved and power consumption is reduced. The array Faraday shield ring, while reducing the peak electric field, effectively increases the output current of the device, increases the power density of the device and reduce power consumption.
Description
technical field [0001] The invention relates to an LDMOS device with an array multilayer Faraday shielding ring structure. Background technique [0002] LDMOS is a radio frequency power device with a lateral double diffusion structure. Compared with ordinary power MOS devices, LDMOS devices have a lightly doped drift region near the gate side to bear the high voltage of device operation. There is a high electric field on the surface of the drift region near the gate, which causes the device to break down first near the high electric field. Compared with ordinary MOS devices, LDMOS has a quasi-saturation effect and a negative resistance effect under high power conditions. Because of these structural characteristics of LDMOS, compared with bipolar transistors, it has obvious advantages such as high linearity, high gain, good temperature stability, high standing wave mismatch ratio, and simple bias circuit. Therefore, LDMOS is widely used in radio frequency amplifiers, such as...
Claims
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IPC IPC(8): H01L29/78H01L29/06H01L21/336
CPCH01L29/0607H01L29/66681H01L29/7816
Inventor 周祥兵高小平高潮黄素娟
Owner 扬州江新电子有限公司