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An anti-latch-up single-chip microcomputer system

A single-chip, anti-latch technology, applied in the field of electronics, can solve problems such as data loss, parameter change, software runaway, etc., to ensure data security, avoid the risk of single-chip latch triggering, and eliminate the external trigger risk of single-chip latch latch.

Active Publication Date: 2020-05-05
WUXI VOCATIONAL & TECHN COLLEGE
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Modern CMOS circuits, especially various microprocessor applications represented by embedded control, are growing geometrically. In the process of prototype debugging and system application, various errors such as software runaway, data loss, and parameter changes often occur. , When solving this kind of problem, eliminate the error of the software itself. Due to the diversity and complexity of the actual application circuit and the external environment, many engineers still have problems after taking quite a lot of measures to avoid latch-ups mentioned above.

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  • An anti-latch-up single-chip microcomputer system
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  • An anti-latch-up single-chip microcomputer system

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Embodiment Construction

[0032] The specific embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

[0033] This application discloses an anti-latch-up single-chip microcomputer system. The system takes measures from various aspects such as power circuit design, clock circuit design, reset circuit design, and I / O port design to avoid the risk of single-chip microcomputer latch-up triggering caused by external conditions. Its overall design is as figure 1 As shown, this application introduces these four aspects respectively:

[0034] 1. Power circuit design

[0035] With the development of semiconductor technology and the increase of portable application requirements, the current MCU products have a wider operating voltage range (usually 1.8V ~ 6V) and less power consumption (usually less than 30mA). Some designers are prone to misunderstandings, and the requirements for the power supply to the microcontroller are not strict. In fact, the...

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Abstract

The invention discloses an anti-latch effect single-chip microcomputer system, which relates to the field of electronic technology. The design of the power supply circuit in the system is from the selection of the power supply to the design method of the power supply filter, eliminating the external trigger risk of the single-chip microcomputer latch caused by the power supply; the design of the clock circuit From the selection of the clock frequency to the layout of the clock circuit, the risk of external triggering of the microcontroller latch caused by the high-frequency clock signal is eliminated; the reset circuit design uses the "light trigger" mechanism to design the reset circuit, with "common power supply" and "isolated power supply" Application compatibility, so that the power supply detection and the leakage channel are linked in time, effectively avoiding the risk of triggering the single-chip latch caused by the reset signal; the high-priority interrupt and the leakage channel are linked in time to ensure data security, and the output port is turned off in an orderly manner. Effectively disintegrate the external formation conditions of the latch-up effect of the single-chip microcomputer; the effective I / O port application method eliminates the external trigger risk of the single-chip microcomputer latch caused by the I / O port.

Description

technical field [0001] The invention relates to the field of electronic technology, in particular to an anti-latch effect single-chip microcomputer system. Background technique [0002] The advantages of CMOS (Complementary Metal Oxide Semiconductor, complementary metal oxide semiconductor) technology, such as low power consumption, non-proportional logic design, and large noise margin, make it a digital circuit, an analog circuit, and a mixed analog and digital circuit on the same chip. preferred technology for circuits. However, the parasitic bipolar transistor inherent in the CMOS structure will be activated under certain conditions, forming a positive feedback and generating a latch, causing the IC (integrated circuit, integrated circuit) circuit to malfunction, causing data or logic state changes, data If it is lost, it will even burn the chip in severe cases, resulting in permanent failure of the circuit. [0003] The current IC layout process design can basically av...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G05B19/042
CPCG05B19/0423G05B2219/25257G01R31/2853G05B2219/34427H03K19/00315G05B2219/34428
Inventor 侯立功吴伟陈天娥肖颖
Owner WUXI VOCATIONAL & TECHN COLLEGE