Latch-up effect resisting microprocessor reset circuit

Abstract

The invention provides a latch-up effect resisting microprocessor reset circuit and relates to the field of electronic technology application, in particular to a reset circuit. The latch-up effect resisting microprocessor reset circuit can effectively avoid latch-up rigger risk brought by a reset signal to a microprocessor and comprises a first-order reset circuit, a power failure detection circuit and a current leakage channel, wherein the power failure detection circuit and the first-order reset circuit are connected through an optocoupler. The first-order reset circuit consists of a resistor and a first capacitor which are connected in series. The power failure detection circuit consists of a diode, a second capacitor and a light-emitting diode inside the optocoupler, wherein the anode of the diode and the cathode of the light-emitting diode are respectively connected with a power supply, the positive pole of the second capacitor and the cathode of the diode are respectively connected with the anode of the light-emitting diode, and the negative pole of the second capacitor is grounded. The current leakage channel consists of a photo-transistor inside the optocoupler and an element in the first-order reset circuit, wherein the element is the first capacitor or the resistor.

Description

Technical field [0001] The anti-latch effect microprocessor reset circuit of the present invention relates to the application field of electronic technology, and is specifically a reset circuit, which can effectively avoid the risk of latch triggering caused by the reset signal to the microprocessor. Background technique [0002] The advantages of CMOS technology such as low power consumption, non-proportional logic design, and large noise tolerance make it the preferred technology for digital circuits, analog circuits, and analog and digital hybrid circuits on the same chip. However, the inherent parasitic bipolar transistor of the CMOS structure will be activated under certain conditions to form a positive feedback, generate a latch, and cause the IC circuit to malfunction, cause data or logic state changes, data loss, and burn the chip in severe cases. Lead to permanent failure of the circuit. [0003] The current IC layout process design can basically avoid the possibility...

AI Technical Summary

Problems solved by technology

However, due to the particularity of the reset signal work, many engineers tend to ignore the microprocessor latch triggered by the reset signal when solving problems, and no research results on the direction of reset and latch correlation have been found in academia and the market.

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