Semiconductor device and electronic device using the same
一种半导体、电位的技术,应用在半导体器件、半导体/固态器件制造、电子开关等方向,能够解决施加等问题,达到防止错误动作或电路元件的破坏的效果
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no. 1 Embodiment approach
[0027] figure 1 It is a circuit diagram showing a configuration example of the semiconductor device according to the first embodiment of the present invention. like figure 1 As shown, the semiconductor device includes an output driver 10, a switch circuit 20, a high-side pre-driver 30a, a low-side pre-driver 30b, a bias potential supply circuit 40, a control circuit 50, and a plurality of terminals (pads) P1 ~P5 may also include an input circuit 60 .
[0028] The first power supply potential VDD is supplied from the power supply terminal P1 to the first node N1 of the semiconductor device. In addition, the second power supply potential VSS lower than the first power supply potential VDD is supplied from the power supply terminal P2 to the second node N2 of the semiconductor device. One of the first power supply potential VDD and the second power supply potential VSS may be the ground potential (0V).
[0029] The signal terminal P3 is at least used for outputting signals. ...
no. 2 Embodiment approach
[0068] Next, a second embodiment of the present invention will be described.
[0069] image 3 It is a circuit diagram showing a configuration example of a semiconductor device according to the second embodiment of the present invention. In the second embodiment, in the output driver 10, not only the second output element but also the first output element has the error tolerance function. In other respects, the second embodiment may be the same as the first embodiment.
[0070] like image 3 As shown, the output driver 10 includes, for example, a transistor QP0 as a first output element and a transistor QN0 as a second output element. Here, a PN junction (parasitic diode) is formed by the drain and the back gate of the transistor QP0. When the back gate of the transistor QP0 is connected to the first node N1, when a potential higher than the first power supply potential VDD and higher than the forward voltage of the parasitic diode is applied to the signal terminal P3 from...
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