A wafer bonding alignment system and alignment method
A wafer bonding and alignment system technology, applied in semiconductor/solid-state device components, semiconductor devices, electrical components, etc., can solve the problem of low alignment accuracy and the inability of measurement light to reach positioning marks, wafer alignment systems and The method cannot meet the problems such as to achieve the effect of improving the wafer alignment accuracy
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Publication Date
- 2020-09-11
Smart Images

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Abstract
Description
technical field
[0001] The invention relates to the field of wafer integration, in particular to a wafer bonding alignment system and alignment method. Background technique
[0002] The existing wafer bonding alignment system and method is to set the positioning mark on the wafer, and calculate the position of the positioning mark in the wafer coordinate system by comparing the desired position and the measured value of the positioning mark in the coordinate system of the detection vision system. The position and the movement distance relative to the coordinate system of the detection vision system are used as position compensation by the data measured by the detection vision system, so that the wafers are aligned and bonded with high precision.
[0003] In the existing wafer bonding alignment system, when there is a certain distance between the positioning marks of the two components to be bonded, the measuring light cannot reach the positioning marks on the two components ...
Examples
Embodiment 1
[0059] figure 1 The structure of a wafer bonding alignment system of the present invention is shown, and the wafer bonding alignment system includes:
[0060] The first wafer 102 and the second wafer 104, the first wafer is provided with a positioning mark 106, and the second wafer is provided with a positioning mark 108 corresponding to the position of the positioning mark 106, and the above two positioning marks are wafer surface plane lens;
[0061] Vision inspection system, including:
[0062] The light source 110 is used to provide measurement light, and the measurement light path is represented by a dotted line in the figure;
[0063] A collimating lens 112 configured to collimate the light emitted by the light source;
[0064] The reticle 114 is configured to superimpose a pattern on the object to be imaged, the pattern is used as a position reference, and can be aligned with the object to be imaged;
[0065] The optical retarder 116 is configured to adjust the opti...
Embodiment 2
[0076] figure 2 A wafer bonding alignment system of another structure of the present invention is shown, and the wafer bonding alignment system includes:
[0077] The first wafer 202 and the second wafer 204, the first wafer is provided with a positioning mark 206, and the second wafer is provided with a positioning mark 208 corresponding to the position of the positioning mark 206, and the above two positioning marks are wafer convex lens;
[0078] Vision inspection system, including:
[0079] The light source 210 is used to provide measurement light, which is represented by a dotted line in the figure;
[0080] A collimating lens 212 configured to collimate the light emitted by the light source;
[0081] The reticle 214 is configured to superimpose a pattern on the object to be imaged, the pattern is used as a position reference, and can be aligned with the object to be imaged;
[0082] The optical retarder 216 is configured to adjust the optical path difference, so tha...
Embodiment 3
[0093] image 3 It shows a wafer bonding alignment system with another structure of the present invention. The difference between this structure and the wafer bonding alignment system shown in Embodiment 2 is that a positioning mark 306 is provided on the first wafer 302 , and the second A positioning mark 308 corresponding to the position of the positioning mark 306 is provided on the second wafer 304, and the above-mentioned two positioning marks are lenses sunken on the surface of the wafer, which are also used to verify whether the two wafers are aligned in the X and Y coordinate directions. allow.