Communication method based on FPGA, FPGA controller and USB adapter
A communication method and controller technology, applied in the field of communication, can solve the problems of complex communication adaptation and application cost of peripheral circuits, and achieve the effects of low application cost, avoiding mutual influence, and reducing use cost
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Embodiment 1
[0021] Embodiment 1, the FPGA controller that is used for communication, as figure 1 shown.
[0022] In this embodiment, a USB controller 101 and an FPGA controller 102 are sequentially connected between the USB master device D1 and the USB slave device D2, wherein the USB controller 101 and the USB master device D1 are connected in a USB communication manner, The FPGA controller 102 and the USB slave device D2 are connected by means of USB communication or IO communication, and the USB controller 101 and the FPGA controller 102 are connected by a bus.
[0023] In this embodiment, the USB controller 101 and the FPGA controller 102 constitute a USB adapter, the former is used to process the underlying USB protocol, and the latter is used to process the driver layer USB protocol. The two communicate and work together to greatly enhance Hardware acceleration effect during USB communication.
[0024] In this embodiment, the USB controller 101 has a functional part that processes...
Embodiment 2
[0027] Embodiment two, communication method based on FPGA, such as image 3 shown.
[0028]At the beginning of the communication, the USB host device D1 sends the payload data to the USB controller 101. After receiving the payload data, the USB controller 101 performs verification processing on it. The verification processing includes data packet flag identification, underlying USB protocol authentication and data packet Integrity verification and other processes, and then, the USB controller 101 sends the verified payload data to the FIFO module 1021 . Thereafter, the FPGA controller 102 will receive the payload data and process the data.
[0029] In this embodiment, the communication method provided is a part of the communication mechanism between the USB master and slave devices, which mainly realizes the processing function of the driver layer USB protocol, which will be combined below figure 1 The communication method is described in detail, and the communication method...
Embodiment 3
[0049] Embodiment three, state machine module operation flowchart, such as Figure 4 shown.
[0050] Since the state machine module 1022 is the control component in the FPGA controller 102, this embodiment will take the active control process of the state machine module 1022 as the main line to describe in detail the processing process of the FPGA controller to the load data, including four processing steps , respectively:
[0051] 301. The state machine module 1022 enters an "idle" state.
[0052] This state is the initial state of the state machine module 1022, and the state machine module 1022 will recognize the data storage state in the FIFO module 1021, and the recognition method can be active or passive.
[0053] In this state, the state machine module 1022 will control the FIFO module 1021 to enable its write operation, so as to obtain the payload data from the USB controller 101 at any time.
[0054] 302. The state machine module 1022 enters the "read FIFO" state. ...
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