Semiconductor structure and formation method thereof

Abstract

The invention relates to a semiconductor structure and a formation method thereof. The formation method includes the following steps that: a base is provided, wherein the base comprises a substrate and discrete fins on the substrate; an isolation structure is formed on the substrate which is not covered by the fins, wherein the isolation structure covers partial sidewalls of the fins; a gate structure which spans the fins and cover partial top surfaces and sidewall surfaces of the fins is formed; the fins at two sides of the gate structure are etched by a certain thickness, so that grooves canbe formed in the fins; anti-punch-through ion implantation is performed on the bottoms of the grooves, so that anti-punch-through doped ion regions can be formed in the fins at the bottoms of the grooves; and doped epitaxial layers are formed in the grooves. Compared with an anti-punch-through ion implantation process which is performed before the isolation structure is formed, the anti-punch-through ion implantation process of the formation method of the invention is small in implantation dose, thereby reducing implantation damage to the fins; anti-punch-through ion implantation is performedon the bottoms of the grooves, so that a short channel effect can be suppressed; and therefore, the electrical performance of the formed semiconductor device is improved.

Description

technical field [0001] The invention relates to the field of semiconductor manufacturing, in particular to a semiconductor structure and a forming method thereof. Background technique [0002] In semiconductor manufacturing, with the development trend of VLSI, the feature size of integrated circuits continues to decrease. In order to accommodate the reduction in feature size, the channel length of MOSFETs has also been shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the control ability of the gate to the channel becomes worse, and the gate voltage pinches off the channel. The difficulty is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (SCE: short-channel effects) more likely to occur. [0003] Therefore, in order to better adapt to the reduction of the feature size, the semiconductor ...

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Problems solved by technology

[0004] However, the electrical performance of semiconductor devices formed by the prior art needs to be improved

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